CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to support@ccsinfo.com

BH616UV8010 SRAM Driver and PIC addressing capabilities

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
Neckruin



Joined: 17 Jan 2006
Posts: 66

View user's profile Send private message

BH616UV8010 SRAM Driver and PIC addressing capabilities
PostPosted: Wed Apr 22, 2009 2:51 am     Reply with quote

Hello,
I have to work with an SRAM external memory model BH616UV8010.
It is a 512Kx16 bits memory with 19 bits address input an 16 bits data in/out and chipselect lines (http://www.farnell.com/datasheets/4466.pdf)
I have never worked with this kind of memory and the first bad news I have encountered is that there is no driver for it in this forum.
My questions are:
Is there any generic driver that can fit this memory?
Is there any compatible model for which the driver can be found?
Is it really necessary a driver?

By the way, I have noticed about many pins called "Address bit X" or "Data bit X" on several Microchip PIC devices. Could someone please clarify me what is that for? I think it could be useful for the memory addressing.

Any help will be welcome :grin:

Thanks.
Neckruin



Joined: 17 Jan 2006
Posts: 66

View user's profile Send private message

PostPosted: Wed Apr 22, 2009 4:44 am     Reply with quote

Well, I already know what the EMB is for.
The problem is that I have to manage the SRAM addresses but not reading or writing any data.
To write data I must set the SRAM properly and then trigger another PIC to "put" the data and to read I have to set the SRAM and then trigger a FIFO that will capture the word.
That means I don't need to care for the data, only for address.
Another problem is that I must extremely optimize the code due to timing constraints so I think that the write_external_memory and read_external_memory functions will add some additional instructions I don't really need.
Does it mean I'll have to write my own write_ext_mem and read_ext_mem routines??? Sad
Any example or help would be really appreciated U_U

Thanks.
asmboy



Joined: 20 Nov 2007
Posts: 2128
Location: albany ny

View user's profile Send private message AIM Address

nned to know more
PostPosted: Wed Apr 22, 2009 2:29 pm     Reply with quote

as usual , you are not revealing enuf info in your question to help guide the answer.

1- WHAT PIC is your MCU ?

2- do you need blocks of SEQUENTIAL addressed read and write capability
( meaning streaming data )
or

3- strictly random addresses for each R/W operation?
( true single byte random access)

answers to those questions determine the best hardware approach to the problem.

Unless you are using an 18F8722 or similar HIGH I/O port count devices - you are going to need some sort of hardware address latch / external counter assistance - or a date with some strung together SPI HC595 type parts to make thia fly cleanly.
Neckruin



Joined: 17 Jan 2006
Posts: 66

View user's profile Send private message

PostPosted: Thu Apr 23, 2009 1:21 am     Reply with quote

You are right, but I really was given very few information to begin working. I should ask my partners to make up their minds before asking me as well.

I answer to your questions:
Quote:
1- WHAT PIC is your MCU ?

PIC18F97J60 (has EMB)
Quote:
2- do you need blocks of SEQUENTIAL addressed read and write capability
( meaning streaming data )

Yes
Quote:
3- strictly random addresses for each R/W operation?

No

I made a small code to estimate how many instructions would be generated for my program and the result was "too much".

Choosing a PIC24 or PIC32 may solve the problem and avoid additional hardware although I think that would be the best solution (CPLD, FPGA..)

By the way... any example code for the "not reading" and "not writing" routines? Smile

Thanks
asmboy



Joined: 20 Nov 2007
Posts: 2128
Location: albany ny

View user's profile Send private message AIM Address

PostPosted: Thu Apr 23, 2009 8:14 am     Reply with quote

depending on if/how the I/O ports are dedicated already in your design - you have the address and control capability easily with that PIC

? define "not reading " and "not writing" ?

do you mean simply manipulating the control lines to read and write data or something else entirely?
Neckruin



Joined: 17 Jan 2006
Posts: 66

View user's profile Send private message

PostPosted: Sun Apr 26, 2009 12:41 pm     Reply with quote

When I say "not reading/writing" I mean that I have to set the address, the enable lines, and all that stuff but I don't want to "catch" the data, just enable another memory/device that will store or provide the data depending whether it is a R or W operation.
It sounds a bit strange, I know.

Well, it seems that finally we are going to use a PIC32 which is very powerfull and not very expensive though.

I have never worked with PIC32 so... I hope to be very lucky :(

At first... there is no CCS C for PIC32, there is?... :(
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group