Strange signals on startup

[andrewvaleri]

Hell,

I have written a simple program for controlling an H bridge circuit. At startup I seem to have random signals goin to the FETs and sometimes destroying them. My startup sequence is as follows.

[andrewvaleri]

When I said signals I mean outputs from the PIC are not what I expect. I expect them to be high impedance during startup and then after I set the TRIS bits to go low. Later on in the code I can control them fine.

[rnielsen]

Just one quick note about using set_tris(). You must use this with fast_io or setting the tris does nothing.

Ronald

[Ttelmah]

As a further comment, remember FET's take very little power, to drive _slowly_. The normal practice, is to apply resistive biases to the inputs, to ensure they are turned off. Otherwise, it only takes a little capacitive coupling to lines that are switched when the system come on, to start to turn them on. The internal diode effects in the FET, can make their inputs act as charge pumps, and voltages induced this way, can lead to disasters...

So, put big value resistors on the gates (1MR), switching them all off. Then (as has been said), ensure you are using fast_io mode, and the compiler will then leave it to _you_ to control the TRIS. Unless this is selected, your 'output_a' instruction, will immediately set the tris to '0', the instruction before you set the tris yourself. I'd suspect this is the main problem.

You also don't need to copy the OSCCAL value. If your fuses select the internal oscillator, the compiler will have automatically added the code to do this.

Why are you enabling the global interrupt, but no individual interrupt?. One without the other, is 'pointless'.

Triple check your bit patterns to the bridge. What pins drive the 'high side' FETs. What pins control the low side ones?. What logic polarity is used for each?. It seems 'unusual' to be turning all the drive pins low.

Best Wishes

[andrewvaleri]

My h-bridge is set up with n-channel mosfets being driven directly from the PIC on the lowside with no pull down or pull up resistors. I haveN channel mosfets driving P-Channel mosfets on the high side of my bridge. The N channel Fets are pulled low via a 10k resistor and the P channel fets are pulled high by a 1.5k resistor.

The low side is driven by C5 and C3 and the high side is driven by A4 abd C4.

This would mean that if all outputs are set low then none of the N-Channel fets would conduct so the all low output should be fine.

The OSSCAL value seems to work fine the way it is so I might as well leave it unless this could sometimes cause an error.

The global interrupt is setup this early in the code as later there is a port A interrupt enabled. I suppose it would be more readable if the code was put together in the same place.

Nowhere in the code am I trying to read from these pins so I can't see this being the problem. However I will add the #use.

[Ttelmah]

Um.
What sort of frequency do you intend to use this for?.
What is the supply voltage?.
Have you got protection diodes across the FETs?.
There are a number of problems that _will_ cause problems latter with this.

I'd suspect the main problem is the output capacitance of the N-channel 'drive' FETs. When the supply switches 'on', the output capacitance of these drive FETs, will try to hold the gate of the P channel FETs 'down' as the supply rises. Effectively, you will have a potential divider, comprising the gate capacitance of the P-channel fet, paralleled with the 'pull up' resistor here, then the resistor to the bottom FET, in series with it's output capacitance to ground. This will tend to turn the P-channel FETs on for a moment, if the supply rises quickly.
Separately, capacitive coupling into the gate inputs of all the N-channel devices, may tend to make them switch 'on' as the supply rises, since they have no drive at all at this time.
Put 4*100K resistors one from each gate of the N-channel FETs to ground. This may solve the problem on it's own.
What sort of frequency do you intend to drive this circuit?.
Power FET's have a surprisingly high input capacitance. Driving them reasonably quickly, requires much more current than you may expect. The PIC output is not really suitable for anything above a few hundred hertz (if these are reasonably large power devices), and you may need to think again about bth the PIC drive, and the high side driver circuit.
Have you got separate overshoot protection diodes on the FETs?. Though these FETs inherently have an internal diode structure, this is slow switching, has quite a high forward voltage, an has a lower current rating than the FET itself. Relying on the internal diodes, is the single largest cause of dead FETs (exception for a few special devices, that have a fast diode deliberately built in, such as some from Hitachi). If you have not got trap diodes, add them...
Have you calculated how fast the FETs will be switched 'off', versus being switched 'on'. Do you have a 'deadband' period when changing the drive, at least as long as the difference between these times?.

Best Wishes

[andrewvaleri]

I intend to use this at essentially 100% duty cycle with the motor going 1 way then the other no PWM control. The supply voltage to the high side of the is either 6V or 12 V and the logic voltage level is 3.3V. Would a higher voltage level such as 5V provide a stronger on for the FETS?

I do not have protection diodes across the FET due to size constraints. I am trying to reduce transients by using a .1 uF capacitor across the motor, a 620 ohm resistor across the motor and .1uF capacitors to gnd on the motor inputs.

I have 10 k resistors pulling down the high side FETS already and as earlier said due to space restraints I do not have room for pull down resistors on the bottom.

My PIC is running at 4 Mhz so each instruction runs at about 1 uS and the switching time for my FETS should be around 500 ns for turn off so this seems fast enough but I will add a delay. I do not have a gate drive resistor I don't think this is needed. IS that correct?

Andrew

[Ttelmah]

Seriously, 3.3v, is below the Vgs needed for most FETs. You need special devics like the UMOS, Epad devices to work from this sort of supply. Remember also that a chip running at 3.3v, only guarantees a 'high' output, of typically 2.6v. What FETs are you using?.
I don't undertstand your drive circuit description. Either post a circuit, or a 'per pin' description, like:

PIC Cx, connects to gate of xxxxx. Source of xxxxx to GND. Drain of xxxxx connects via yyKR ohm resistor to gate of zzzzzz. etc..

You talk about 'pull down' resistors for the high side FETs, but these need _pull up_ resistors to turn them off...
How are the supplies sequenced?. Can the high voltage supply go 'high' before the PIC's supply?. My suspicion is that your problem actually has nothing to do with the PIC, but comes about from other causes (possibly though including things like the PICs internal protection diodes, clamping the output pins below supply rail that has not yet risen...).
No, you don't need gate drive resistors.

Best Wishes