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Guest
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| Timer1 problem with TMR1H bit 7 |
 Posted: Tue Jul 29, 2008 12:44 pm |
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Timer Q:
PIC18F2455
First the timer is running, but some confusing on TMR1H TMR1L...
The compiler do nothing wrong, I looked at the list file, it is ok.
I use Timer1 as a real time clock. Connecting a 32.768KHz osc to pin 11(T1OSO)/12(T1OSI)
The config for the timer1 is: 1/32768*0x8000 => 1 sec.
First time config will be: set_timer1(0x8000);
The interrupt is working but if I use TMR1H bit 7 and set it =1, the interrupt will be every 2 sec this is wrong.
But if I load TMR1L bit 7 all is working as expected. But is there some addressing fault in the documentation?
| Code: | #int_TIMER1 //RTC!
void Timer_1_int(void){
#byte TMR1H = 0xFCE // The correct address is 0xFCF but it will not work?
TMR1H=TMR1H|0x80;
/*Same as
#asm
BSF TMR1H, 7
#endasm
*/
(more code)
} |
Some help... |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Jul 29, 2008 1:31 pm |
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You are doing a read-modify-write operation.
This requires special handling, depending on the state of the RD16 bit
in the T1CON register. CCS sets the RD16 bit = 1 in the T1CON register
when you call the setup_timer_1() function.
It's all explained in this section of the data sheet:
| Quote: | | 12.2 Timer1 16-Bit Read/Write Mode |
It says:
| Quote: | The high byte of Timer1 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timer1 High Byte Buffer register. |
18F2455 data sheet:
http://ww1.microchip.com/downloads/en/DeviceDoc/39632D.pdf |
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Guest
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| Posted: Tue Jul 29, 2008 1:59 pm |
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Hi
TMR1H=TMR1H|0x80;
r-m-w: not in this case just the same as put bit 7 = H. But anyway thats not the problem.
The problem is maybe "CCS sets the RD16 bit = 1"
How to just set bit 8 in THR1H reg without playing with the other one? Because my way work not in the real world. |
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Guest
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| Posted: Tue Jul 29, 2008 2:06 pm |
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Please look at "EXAMPLE 12-1:" they use to load bit 7 in the reg?
But read the 12.2, but how to do it? |
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Guest
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| Posted: Tue Jul 29, 2008 2:20 pm |
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The solution to clear D16
| Code: | #byte T1CON = 0xFCD
T1CON=0x0f; |
Now all run ok:-)
| Code: | | setup_timer_1(T1_EXTERNAL|T1_DIV_BY_1|T1_CLK_OUT); |
Will load the T1Con with 0x8F.
But why use CCS D16 = 1. And not possible to clear it? |
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Ttelmah
Guest
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| Posted: Tue Jul 29, 2008 2:55 pm |
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| Code: |
#byte TMR1H=0xFCF
#byte TMR1L=0xFCE
#bit TOP_BIT=TMR1H.7
int8 LSB;
LSB=TMR1L; //trigger the read
TOP_BIT=1; //update the _latched_ high byte
TMR1L=LSB; //Write back to the low byte to trigger the load
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Best Wishes |
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Guest
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| Posted: Tue Jul 29, 2008 11:01 pm |
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Hi
1(
Reading the last sign bit in the low reg is ok, but when write it back minor clock cycle later, will it clear the bit if the hardware counter had change it, right?
But your model is smart.
(2
I still wonder why CCS not put a option to clear D16 on some normally way. Or why they set it on all their function. |
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Ttelmah
Guest
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| Posted: Wed Jul 30, 2008 2:10 am |
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Yes.
You need to remember though, that when you update the counter, even in 8bit mode, it _resets_the prescaler. So there will be a time loss, even when using the 8bit updates. With the 16bit write, the prescaler is not affected by the write to the latch, but is cleared when you write the low byte. 16bit mode is 'safer' to work with, since it updates both halves of the timer, and resets the prescaler, on the same clock cycles. This is why it is present in the first place, and why CCS use it.
Best Wishes |
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