Mod ( % ) and uint64_t

[bkamen]

[bkamen]

Speaking of which --

I updated some code in someone else's project like 11-12yrs ago.

Embedded Linux based gizmo that had to pick up readings from a LTC1859 ADC.

The original code had use of an SPI port, but did all the chip selects and hand shaking in software polling along.

The time it took to read 8 registers of 16bit data was something like 500uS-1mS.

All those blocking delays in the code. (oy!)

I ended up writing code for the FPGA the ADC was hooked to that the CPU had to go through to access the ADC that would just auto-run and get all the readings automatically all the time. The only moments it stopped was when the CPU was reading a result register.

This now happened in about 4uS. Woot. That was fun.
_________________
Dazed and confused? I don't think so. Just "plain lost" will do. :D

[temtronic]

'worth it' ?
probably, providing the FPGA was coded correctly, it 'should' be a LOT faster than a PIC doing the calculations and SPI xfers are fast....

editted....

i did a quik google....

seems there were FPUs for PICs ( PICAXE had one...), though no mention as to speed of calculations..... Also found a PIC32 with FP 'engine' under the hood..
I suspect the PICAXE chip would have been no better than the routines CCS supplies,rather just an easy way,to get a small PIC to do some high powered 'math'.

Depending on the need for speed, it 'might' be worth it to 'offload' the math to a 'coPIC', allowing the master PIC to do 'main' functions, while coPIC crunches the numbers. Fortunately, none of my projects are that 'mathmatically complicated'.

[Ttelmah]

Seriously though it'd be a large FPGA.
Even a basic 16bit arithmetic unit uses several hundred gates. The old
Intel FPU for the 386, had 120000 transistors in it.
There are libraries for FPGA floating point. These first became available
about 20 years ago, when the first FPGA's were launched that had enough
gates to build these.