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salihonur
Joined: 21 Mar 2020
Posts: 22
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| PIC24FJ256GB106 - read_eeprom/write_eeprom problem |
 Posted: Tue Jun 09, 2020 4:33 pm |
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Hi,
I have a strange problem. I'm moving code from 18F46K80 to 24FJ256GB106. read_eeprom and write_eeprom doesn't work for internal eeprom. I'm getting this message.
| Quote: | | Error#112 Function used but not defined: ... read_eeprom 1694 SCR=7384 |
The related lines:
| Code: |
/////////////////////////////////// WRITE BYTE /////////////////////////////////
void write_eeprom_byte(TYPEDEF_EEPROM_ADDR addr, int8 val)
{
write_eeprom(addr, val);
}
////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////// READ BYTE //////////////////////////////////
int8 read_eeprom_byte(TYPEDEF_EEPROM_ADDR addr)
{
return read_eeprom(addr);
}
////////////////////////////////////////////////////////////////////////////////
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I have tried with both 5.010 and 5.091 versions of PCWHD. I have checked 24FJ256GB106.h file and I have realized that the related functions aren't defined. So I decided to try adding theese lines into my file.
| Code: | // EEPROM Prototypes:
#ifndef __EEADDRESS__
#if getenv("DATA_EEPROM")>256
#define __EEADDRESS__ unsigned int16
#else
#define __EEADDRESS__ unsigned int8
#endif
#endif
_bif unsigned int8 read_eeprom(__EEADDRESS__ address);
_bif void write_eeprom(__EEADDRESS__ address, unsigned int8 value); |
But still I'm getting same problem. How can I write and read to internal eeprom?
Note: I know eeprom size of PIC24 is 16 bit. I'm not thinking it yet. Fırst I need to read/write to the internal eeprom. Then optimization. |
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jeremiah
Joined: 20 Jul 2010
Posts: 1320
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| Posted: Tue Jun 09, 2020 5:15 pm |
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| Does it have an internal EEPROM? Just glancing at the description I don't see one mentioned and they normally mention it. A lot of PIC24s don't have an EEPROM built in. Double check the data sheet and see if it actually has one. |
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dyeatman
Joined: 06 Sep 2003
Posts: 1914
Location: Norman, OK
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| Posted: Tue Jun 09, 2020 6:21 pm |
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Ttelmah,
It appears you are correct. No EEprom.
Flash and SRAM are the only types.
However, it does say the Flash has EEProm
emulation capability but didn't see anything
that explained how that worked in the
data sheet.
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Last edited by dyeatman on Tue Jun 09, 2020 9:47 pm; edited 1 time in total |
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newguy
Joined: 24 Jun 2004
Posts: 1903
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| Posted: Tue Jun 09, 2020 6:59 pm |
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The compiler supports EEPROM emulation but I'm unsure of the function names nor whether that particular processor would support it (needs the ability to self write flash).
Edit: searched a bit but can't find the CCS terminology/implementation. Ttelmah wrote one that can be found in this thread: http://www.ccsinfo.com/forum/viewtopic.php?t=53530&highlight=eeprom+emulation |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Jun 09, 2020 10:33 pm |
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This is the CCS driver:
c:\....\picc\drivers\virtual_eeprom.c |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19258
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| Posted: Tue Jun 09, 2020 11:02 pm |
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and, it does work. But it needs a minimum of two pages of the program
memory, so uses a lot of space.
To use it, to give 256bytes of 'virtual' EEPROM:
| Code: |
//Your chip setup
//Then:
#define VIRTUAL_EEPROM_NUM_PAGES 1
#define VIRTUAL_EEPROM_8BIT_ADDY
#include <virtual_eeprom.c>
//This then uses just two pages of the flash memory
//(always uses number of pages *2), and an 8bit 'address'
//Then near the start of the 'main' before using it:
init_virtual_eeprom();
//Then to write a byte to address 0:
write_virtual_eeprom(0,val);
//and to read a byte from address 0:
val=read_virtual_eeprom(0);
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Just like 'real' EEPROM, unprogrammed locations will read as 0xFF.
With '8BIT_ADDY' enabled, addresses can be 0 to 255.
It writes a 'record' to the page, containing the byte required, and the
'address' being emulated. To change a byte it sets the address to an
invalid value, and writes a new record. When the page gets full, it
copies all valid bytes into the second page, and erases the first (this
is why it has to use two pages). To read, it looks through the page to
find the record with the required address, and returns the byte from this.
The erasable page on this chip is 512 instructions, so 1536 bytes (but
2KB of address range), so this uses about 0x1400 bytes in total (for
code and the memory used for the emulation). |
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jeremiah
Joined: 20 Jul 2010
Posts: 1320
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| Posted: Wed Jun 10, 2020 8:08 am |
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| dyeatman wrote: | Ttelmah,
It appears you are correct. No EEprom.
Flash and SRAM are the only types.
However, it does say the Flash has EEProm
emulation capability but didn't see anything
that explained how that worked in the
data sheet. |
But I'm not Ttelmah  |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19258
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| Posted: Wed Jun 10, 2020 9:18 am |
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We're obviously alter ego's....
I saw he'd 'hiccuped' on replying to you as me. |
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salihonur
Joined: 21 Mar 2020
Posts: 22
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| Posted: Wed Jun 10, 2020 3:42 pm |
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Sorry my mistake. I interpreted SRAM as an eeprom. You are right. Lucky I have added 3 additional external eeproms on the board just in case. it's time to use them 
I would like to thank all of you  |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19258
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| Posted: Thu Jun 11, 2020 12:31 am |
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As A comment, I don't see anywhere in the data sheet where it talks
about "EEProm emulation capability". It has sections about controlling
an external parallel EEPROM using the PMP, and interfacing to serial
EEPROM's using SPI, but does not talk about such 'emulation'. MicroChip
do have an application note on doing this, that applies to most of their
chips, and is based on the same way of working as the CCS code.
Anyway, glad you have got an external EEPROM. |
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