View previous topic :: View next topic |
Author |
Message |
andresteff
Joined: 21 Mar 2020 Posts: 44
|
wrong pulse width with PIC16LF1619 |
Posted: Tue Jan 19, 2021 10:12 am |
|
|
I use the PWM Module from the PIC16LF1619.
PWM with CCP1 and CCP2
- Fosc=500kHz, internal RC clock
-CCP1 + timer2 at PIN_RC5
-CCP2 + timer6 at PIN_RA2
My Problem the pulse width for the value under point 1) they is not correct.
1)
pre=1:2, duty=1, PR2=0: Pulse width is 12µs! That's wrong!!!!! The calculated pulse width must be 4µs!
Period=16µs, OK.
Equations from page 351 of the PIC 16LF1619:
Pulse Width = CCPRxH:CCPRxL x TOSC x (TMR2 Prescale Value)
PWM Period = (PR2 + 1) x 4 T x OSC x TMR2 Prescale Value)
2)
pre=1:2, duty=1, PR2=1: pulse width = 4µs, that's OK. T=32us it's also OK.
3)
pre=1:1, duty=1, PR2=0 : pulse width = 2µs, that's OK. T=8us it's also OK.
I also tested the ccp2 module with timer6. The results are equal!
Additionally i have output the postscaler of timer2 and timer 6.
Code: |
// CCP1 at PIN_C5
setup_ccp1 (CCP_PWM | CCP_TIMER2 );
TMR2 = 0;
duty1 = 1;
setup_timer_2( T2_DIV_BY_1 | T2_CLK_INTERNAL, 0, 1 ); // T2_CLK_INTERNAL = Fosc/4
set_pwm1_duty (duty1);
// CCP1 at PIN_A2
setup_ccp2 (CCP_PWM | CCP_TIMER6 ); // PWM ON
TMR6 = 0;
duty2=1;
setup_timer_6( T6_DIV_BY_1 | T6_CLK_INTERNAL , 0, 1 );
set_pwm2_duty (duty2);
// Timer2 Postscaler at PIN_A5
SETUP_CLC1(CLC_ENABLED | CLC_OUTPUT | CLC_MODE_AND_OR);
clc1_setup_input(1, CLC_INPUT_TIMER2);
clc1_setup_gate(1, CLC_GATE_NON_INVERTED_INPUT_1 );
clc1_setup_gate(2, CLC_GATE_CLEAR | CLC_GATE_NAND);
clc1_setup_gate(3, CLC_GATE_CLEAR);
clc1_setup_gate(3, CLC_GATE_CLEAR);
// Timer6 Postscaler at PIN_B6
SETUP_CLC2(CLC_ENABLED | CLC_OUTPUT | CLC_MODE_AND_OR);
clc2_setup_input(1, CLC_INPUT_TIMER6);
clc2_setup_gate(1, CLC_GATE_NON_INVERTED_INPUT_1 );
clc2_setup_gate(2, CLC_GATE_CLEAR | CLC_GATE_NAND);
clc2_setup_gate(3, CLC_GATE_CLEAR);
clc2_setup_gate(3, CLC_GATE_CLEAR);
while(1){} |
|
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19540
|
|
Posted: Tue Jan 19, 2021 11:29 am |
|
|
You don't show us what 'type' the variable duty1 is?.
Matters enormously.
It needs to be an int16.
If it is an int8, then the low two bits of the CCP setting, won't come from
this. They can be predefined in the CCP setup. Sounds to me as if they
are defaulting to 3. |
|
|
temtronic
Joined: 01 Jul 2010 Posts: 9244 Location: Greensville,Ontario
|
|
Posted: Tue Jan 19, 2021 12:04 pm |
|
|
As Mr. T. says 'type' matters !
I'd say Unsigned Int16 , Unsigned as PWM value cannot be a negative number.
Yes, CCS usually 'defaults' int16 to unsigned BUT that's not 'carved in stone' for ALL PICs..... |
|
|
andresteff
Joined: 21 Mar 2020 Posts: 44
|
i use int16 |
Posted: Tue Jan 19, 2021 12:55 pm |
|
|
I use int16 for duty1 and duty2
here again the complete code.
Code: |
#include <16LF1619.h>
#device ADC=10
//#device ICD=TRUE
#use delay(internal=500kHz)
#pin_select CCP1OUT=PIN_C5 // CCP1 PWM
#pin_select CCP2OUT=PIN_A2 // CCP2 PWM
#pin_select CLC1OUT=PIN_A5 // CLC1
#pin_select CLC2OUT=PIN_B6 // CLC2
// Timer2
#byte TMR2 = 0x01A
// Timer6
#byte TMR6 = 0x41A
/*
#include <float.h>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
*/
int16 duty1, duty2;
void main()
{
// CCP1 at PIN_C5
setup_ccp1 (CCP_PWM | CCP_TIMER2 );
TMR2 = 0;
duty1 = 1;
setup_timer_2( T2_DIV_BY_2 | T2_CLK_INTERNAL, 0, 1 ); // T2_CLK_INTERNAL = Fosc/4
set_pwm1_duty (duty1);
// CCP1 at PIN_A2
setup_ccp2 (CCP_PWM | CCP_TIMER6 ); // PWM ON
TMR6 = 0;
duty2=1;
setup_timer_6( T6_DIV_BY_1 | T6_CLK_INTERNAL , 0, 1 );
set_pwm2_duty (duty2);
// Timer2 Postscaler at PIN_A5
SETUP_CLC1(CLC_ENABLED | CLC_OUTPUT | CLC_MODE_AND_OR);
clc1_setup_input(1, CLC_INPUT_TIMER2);
clc1_setup_gate(1, CLC_GATE_NON_INVERTED_INPUT_1 );
clc1_setup_gate(2, CLC_GATE_CLEAR | CLC_GATE_NAND);
clc1_setup_gate(3, CLC_GATE_CLEAR);
clc1_setup_gate(3, CLC_GATE_CLEAR);
// Timer6 Postscaler at PIN_B6
SETUP_CLC2(CLC_ENABLED | CLC_OUTPUT | CLC_MODE_AND_OR);
clc2_setup_input(1, CLC_INPUT_TIMER6);
clc2_setup_gate(1, CLC_GATE_NON_INVERTED_INPUT_1 );
clc2_setup_gate(2, CLC_GATE_CLEAR | CLC_GATE_NAND);
clc2_setup_gate(3, CLC_GATE_CLEAR);
clc2_setup_gate(3, CLC_GATE_CLEAR);
while(1){}
while(TRUE)
{
//TODO: User Code
}
}
|
|
|
|
andresteff
Joined: 21 Mar 2020 Posts: 44
|
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19540
|
|
Posted: Wed Jan 20, 2021 1:58 am |
|
|
Classic important line needed here:
What compiler version???.
Just checked on the current compiler, and everything is setup correctly.
However went back a number of versions, and I notice it does set the
enable bit before completing the setup. Now some of the registers
can't be changed after the peripheral is enabled, so this might be
causing problems. So what version compiler is involved? |
|
|
andresteff
Joined: 21 Mar 2020 Posts: 44
|
Version 5.080 |
Posted: Wed Jan 20, 2021 4:22 am |
|
|
I use version 5.080 |
|
|
andresteff
Joined: 21 Mar 2020 Posts: 44
|
test with X8C Compiler, also wrong |
Posted: Thu Jan 21, 2021 12:30 pm |
|
|
I tested the ccp module with the MPLAB X IDE + XC8.
The same result, that i have with the CCS.
@ Ttelmah: You write that maybe the version of the CCS Compiler is the problem.
What can i do? |
|
|
temtronic
Joined: 01 Jul 2010 Posts: 9244 Location: Greensville,Ontario
|
|
Posted: Thu Jan 21, 2021 3:01 pm |
|
|
Since another compiler does the same thing (not work) it may not be CCS related, maybe a misprint in the datasheet (wrong bits or wrong register) so that EVERYONE has the problem ??
Cut a real small program, then post the listing so we can SEE what's being done. |
|
|
andresteff
Joined: 21 Mar 2020 Posts: 44
|
microchip confirmed error |
Posted: Thu Feb 04, 2021 3:04 am |
|
|
I have contacted Microchip.
They confirm the error in the PWM module.
best regards |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19540
|
|
Posted: Thu Feb 04, 2021 6:10 am |
|
|
Ouch.
Hopefully they will post a 'fix', and then this can be implemented. |
|
|
|