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ADC on PIC24FJ256GA705

 
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nazoa



Joined: 09 Feb 2007
Posts: 55

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ADC on PIC24FJ256GA705
PostPosted: Fri Jul 05, 2024 1:25 pm     Reply with quote

Hello,

I'm having problems getting the ADC to work on a PIC24FJ256GA705 chip.
I have the following simple code.

#DEVICE ADC=10

Then in my main code, the ADC is set up as follows.

setup_adc_ports(sAN10, VSS_VDD); //Use pin C0 as analog input
setup_adc(ADC_CLOCK_INTERNAL);
set_adc_channel(10);

Then, a routine to read the ADC is as follows:

int16 R;
R=read_adc(adc_start_and_read);

The problem is that an ADC value is never returned. The thing times out.
Any suggesstions?
Thanks
temtronic



Joined: 01 Jul 2010
Posts: 9160
Location: Greensville,Ontario

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PostPosted: Fri Jul 05, 2024 2:38 pm     Reply with quote

You really need to post a short, complete program that others can copy/compile/test.
Ttelmah



Joined: 11 Mar 2010
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PostPosted: Sat Jul 06, 2024 2:45 am     Reply with quote

and (critical), what compiler version?????.

There were issues with several things on this family around 5.080, so the
version is very important.
Also, use the correct case for the ADC_START_AND_READ define. Though
this should not matter in the default setup with case significance turned off,
it is always better to use upper case for defines, since his helps to tell
everyone that it is a define.
Ttelmah



Joined: 11 Mar 2010
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PostPosted: Sat Jul 06, 2024 10:27 am     Reply with quote

A couple of other comments:

First the high speed ADC on chips like this has a much lower input impedance
requirement than the standard old PIC ADC. How are you feeding this?. It
really needs to be fed by an op-amp, not from any form of resistive
divider.
Second, these ADC's are differential. You can specify Vss as the second
input, but this does need to be specified.

Also (just added), one other critical thing. You cannot use the internal RC as you show!. You have to use this divided by two. The clock rate of the
internal RC, is faster than the ADC supports. From the data sheet:
Quote:

the TAD (min) time is greater than the 4 MHz period of the dedicated ADC RC clock generator. Therefore, TAD must be 2 TCYC in order to use the RC clock for fastest throughput.


You also should be specifying a sample time. The data sheet again says:
Quote:

the sample time (in TAD) must be long enough, over all conditions, to charge/discharge CHOLD. Do not assume one TAD is sufficient sample time;
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