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Jerry I
Joined: 14 Sep 2003 Posts: 96 Location: Toronto, Ontario, Canada
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Disabling Switching Oscillator Speed (Solved) |
Posted: Sat Apr 11, 2020 12:50 pm |
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This is a first for me using a PIC18F27K40.
Compiler Version 5.078
I am rewriting code for exiting hardware and bought this chip.
The exiting hardware has 10Mhz crystal.
I have set the fuses to get the processor to run at 40Mhz and it appeared that I had got it working.
To my surprise I found a defective component on the board interfaced to a limit switch On/Off to Ground. The switch feeds I/O line pin RA3. Switch open I/O line @ 5v, Switch Closed I/O lin @ 0v. The defective part forced the I/O line RA3 to always be @ 0v. After replacing a FET which also fed a LED connected to I/O Line RA3 it appeared the processor would not start anymore.
I did find if I/O line RA3 is 0v processor starts fine, if RA3 is at 5v the processor does not start.
I connected the CCS ICD to find out what was going on. I found that if I/O line RA3 is @ 5v processor start at 4.xx Mhz, If the RA3 I/O line is @ 0v the processor starts @ 40Mhz the speed that I always want.
Looking through the datasheet it appears this processor can switched to run at kind of a sleep mode at start. HOW DO I DISABLE THIS.
Looking at the fuses table from the device file, has many options but I don't know which fuse it can be. CCS does not provide descriptions of these fuses.
I tried a few others, but had no effect to the oscillor speed.
The datasheet is pretty confusing.
Current fuses working below @ 40Mhz only if RA3 is @ 0v
Code: |
#fuses HS, RSTOSC_EXT_PLL, NOWDT, NOPROTECT
#fuses MCLR, PUT, BROWNOUT
AVAILABLE FUSES FROM DEVICE FILE BELOW
//////// Fuses: LP,XT,HS,NOEXTOSC,ECL,ECM,ECH,RSTOSC_HFINTRC_64MHZ
//////// Fuses: RSTOSC_EXT_PLL,RSTOSC_SOSC,RSTOSC_LFINTRC
//////// Fuses: RSTOSC_HFINTRC_1MHZ,RSTOSC_EXT,CLKOUT,NOCLKOUT,NOCKS,CKS
//////// Fuses: NOFCMEN,FCMEN,NOMCLR,MCLR,PUT,NOPUT,LPBOR,NOLPBOR,NOBROWNOUT
//////// Fuses: BROWNOUT_SW,BROWNOUT_NOSL,BROWNOUT,BORV28,BORV27,BORV24
//////// Fuses: NOZCDDIS,ZCDDIS,NOPPS1WAY,PPS1WAY,NOSTVREN,STVREN,DEBUG
//////// Fuses: NODEBUG,XINST,NOXINST,WDT64,WDT128,WDT256,WDT512,WDT1024
//////// Fuses: WDT2048,WDT4096,WDT8192,WDT16384,WDT32768,WDT65536,WDT131072
//////// Fuses: WDT262144,WDT524299,WDT1048576,WDT2097152,WDT4194304
//////// Fuses: WDT8388608,WDT32,WDTSW,NOWDT,WDT_SW,WDT_NOSL,WDT,WDTWIN_12%
//////// Fuses: WDTWIN_25%,WDTWIN_37%,WDTWIN_50%,WDTWIN_62%,WDTWIN_75%
//////// Fuses: WDTWIN_100%,WDTWIN_SW,WDTCLK_LFINTRC,WDTCLK_HFINTRC
//////// Fuses: WDTCLK_SW,WRT,NOWRT,WRTC,NOWRTC,WRTB,NOWRTB,WRTD,NOWRTD
//////// Fuses: NOSCANE,SCANE,NOLVP,LVP,PROTECT,NOPROTECT,CPD,NOCPD,EBTR
//////// Fuses: NOEBTR,EBTRB,NOEBTRB
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Thanks in advance for any help. ![Shocked](images/smiles/icon_eek.gif)
Last edited by Jerry I on Sun Apr 12, 2020 1:44 pm; edited 1 time in total |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19378
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Posted: Sat Apr 11, 2020 1:33 pm |
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Actually CCS do describe the fuses. Look in fuses.txt.
Show your clock statement. This is vital.
There is no reason for RA3 to affect the clock settings.
Are you sure you have both ground pins connected?. Both are required. |
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temtronic
Joined: 01 Jul 2010 Posts: 9177 Location: Greensville,Ontario
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Posted: Sat Apr 11, 2020 1:36 pm |
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I don't use that PIC but you should have a 'fuses.txt' file or similar in the CCS folder. That will contain a list of all fuses and probable names. Sorry can't check, not on the 'PIC PC'.
As for RA3... have you disabled the ADC for that pin ??
Jay |
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newguy
Joined: 24 Jun 2004 Posts: 1903
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Posted: Sat Apr 11, 2020 1:42 pm |
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Replace the processor, then see if the new (virgin) processor also exhibits this same behaviour. I suspect your processor might be damaged, ESD or otherwise.
I ran into a similar issue but only with PICs that I salvaged from existing PCBs (scavenged from Rev A to use on Rev B). An input connected to a reed switch did something similar: fine if reed was open (input pulled high) at power up but not fine if reed was closed (pulled down). Actually I say fine but a more accurate description would be "less broken".
My ESD countermeasures are pretty good, so I don't think the processors were compromised by ESD. I think it may have been all the reflow cycles to which I subjected the processors. |
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temtronic
Joined: 01 Jul 2010 Posts: 9177 Location: Greensville,Ontario
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Posted: Sat Apr 11, 2020 2:02 pm |
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hmm, newguy does bring up another issue.... WHICH case version and who designed/made the PCB ? |
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Jerry I
Joined: 14 Sep 2003 Posts: 96 Location: Toronto, Ontario, Canada
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Posted: Sat Apr 11, 2020 2:10 pm |
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Hi All,
Thanks for the fuses.txt file info.
Since I did not design the board, I know this board has been working fine in the field. I did check both grounds pins on the chip and they are grounded.
My #USE delay Statement
#use delay(clock=40000000)
Original chip was a PIC18F2610 and worked fine
I tried a PIC18F2620 in my original testing and worked fine.
I went with the PIC18F27K40 for the additional program memory and I required 2nd hardware uart.
I tried 3 other new chip from Digi-Key they all do the same thing??
How can I paste an image in this post. I have seen it done in other postings.
Someone should make a sticky on the forum describing this.
I wanted to show a schematic of the RA3 input. I would say it was not designed well.
I pulled the RA3 pin out of the socket and it is floating with PU enabled @ 4.9x volts. When RA3 is plugged into the socket voltage on RA3 is @ 5.64v
It looks like the higher voltage on the pin of this chip effects the oscillator at startup, but does not effect the other chips mentioned above.
![Shocked](images/smiles/icon_eek.gif) |
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gjs_rsdi
Joined: 06 Feb 2006 Posts: 468 Location: Bali
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Posted: Sat Apr 11, 2020 5:07 pm |
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Hi Jerry
Maybe copy/paste the picture to your post will work.
What I was advised is to post the picture on a hosting website and post a link to it.
Your problem seems to be the PCB design. Maybe the PIC18F27K40 is more sensitive to interference so if you will post the PCB design someone can have some idea.
Also the 5.64 volt is over the limit for the PIC input. Try to connect your VDD via a resistor to pin A3 and see if the problem persists.
Best wishes
Joe |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19378
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Posted: Sun Apr 12, 2020 12:33 am |
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OK.
First change the clock to:
#use delay(CRYSTAL=10MHz, CLOCK=40MHz)
This ensures the compiler knows how the PLL needs to be configured.
But your real problem is hardware. Generally newer 'low power' chips
have much less 'margin' for things like overvoltage. Assuming the supply
voltage is 5v, the maximum allowed on an input pin for this chip is
Vdd+0.3v (section 38.1 in the data sheet). Now the internal clamp current
supported is the same as for your 2620, but the newer chips generally
do say that if a voltage above the Vdd+0.3v is likely on any pin, external
clamp diodes should be provided. What is happening, is that the voltage
is actually being clamped back to the supply by the internal clamp
diodes, 'through' the chip substrate. It just 'happens' that the part of the
chip through which this current is flowing must be a part involved
with the PLL on this chip, and hence your problem.... ![Sad](images/smiles/icon_sad.gif) |
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Jerry I
Joined: 14 Sep 2003 Posts: 96 Location: Toronto, Ontario, Canada
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Posted: Sun Apr 12, 2020 1:46 pm |
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Ttelmah wrote: | OK.
First change the clock to:
#use delay(CRYSTAL=10MHz, CLOCK=40MHz)
This ensures the compiler knows how the PLL needs to be configured.
But your real problem is hardware. Generally newer 'low power' chips
have much less 'margin' for things like overvoltage. Assuming the supply
voltage is 5v, the maximum allowed on an input pin for this chip is
Vdd+0.3v (section 38.1 in the data sheet). Now the internal clamp current
supported is the same as for your 2620, but the newer chips generally
do say that if a voltage above the Vdd+0.3v is likely on any pin, external
clamp diodes should be provided. What is happening, is that the voltage
is actually being clamped back to the supply by the internal clamp
diodes, 'through' the chip substrate. It just 'happens' that the part of the
chip through which this current is flowing must be a part involved
with the PLL on this chip, and hence your problem.... ![Sad](images/smiles/icon_sad.gif) |
Thanks Ttelmah
Its definitly a harware problem. Added a resistor from RA3 of 3.3K to ground and problem is now solved. |
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