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RossJ
Joined: 25 Aug 2004
Posts: 66
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| #use spi and PPS settings |
 Posted: Tue Jul 23, 2019 8:32 am |
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Hi all,
I'm trying to get an SPI working on the PIC18LF27K40 (PCH 5.082, although I've tried other versions).
| Code: | #pin_select SDI1 = PIN_B7
#pin_select SDO1 = PIN_C2
#pin_select SCK1IN = PIN_B6
#use spi (spi1, slave, mode=1, bits=8)
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When I try to compile it, I get the following error...
| Quote: | *** Error 99 "D:\Test1\Main.c" Line 42(5,39): Option invalid Not valid for H/W
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I've tried lots of variations including removing the PPS stuff and various SPI options. The most minimal code which produces the error is...
It's almost like the compiler just doesn't recognise that this PIC has SPIs. The device browser seems to indicate support, and the header file contains SPI stuff. The following version compiles! But god only knows which MSSP it's using.
| Code: | #use spi (slave, mode=1, bits=8)
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What am I doing wrong here? Or is this a bug with this device?
/Ross
Last edited by RossJ on Wed Jul 24, 2019 6:58 pm; edited 1 time in total |
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gaugeguy
Joined: 05 Apr 2011
Posts: 303
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| Posted: Tue Jul 23, 2019 10:21 am |
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This works on a 18F26K40 fpr SPI master mode:
| Code: |
#pin_select SCK1OUT = PIN_C3
#pin_select SCK1IN = PIN_C3
#pin_select SDO1 = PIN_C5
#pin_select SDI1 = PIN_C4
#use spi(SPI1,BITS=8,MODE=1, BAUD=100000)
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I have not tried it as a slave. |
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RossJ
Joined: 25 Aug 2004
Posts: 66
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| Posted: Tue Jul 23, 2019 9:16 pm |
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Thanks for your help gaugeguy!
It turns out that the two important lines of your code are the #pin_select SCK1OUT and the #use spi. It was the SCK1OUT not being defined that was causing me grief. I didn't set it because I am using slave mode and use SCK1IN instead. It seems CCS doesn't consider this detail! Being able to set both to the same pin and then using the TRIS (and other SPI settings) to control the direction is a neat workaround.
Cheers, Ross |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19520
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| Posted: Wed Jul 24, 2019 12:42 am |
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If you study the SSP, it makes the internal connection for clock 'out', even
when running in slave mode, and it is switched off.
In master mode, the clock 'in' connection has to be made, even though the
master is generating the clock (it's used to clock the shift register).
Interestingly, you can actually separate the CKIN, and CKOUT connections
on some of these chips and clock data 'in' to a master SPI, on a different clock
from the one it is generating!...
It is quite 'non intuitive' that you have to setup both. It'd honestly be 'better'
to have a single definition SCK1, that made both the input and output
connections and offer the separate SCKIN and SCKOUT connections for
when they are specifically required. |
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RossJ
Joined: 25 Aug 2004
Posts: 66
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| Posted: Wed Jul 24, 2019 6:56 pm |
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Hi Ttelmah,
I found a couple of interesting items in the PIC18LF27K40 datasheet...
| Quote: | In Master mode the clock signal output to the SCK pin is also the clock signal input
to the peripheral. The pin selected for output with the RxyPPS register must also be selected as
the peripheral input with the SSPxCLKPPS register. The pin that is selected using the
SSPxCLKPPS register should also be made a digital I/O. This is done by clearing the
corresponding ANSEL bit. |
This suggests that at least in master mode, both PPS directions for the clock must be defined and refer to the same physical pin. It's interesting they chose to work this way as the schematic shows a separate direct path from the clock generator to the shift register. Still, I'm sure Microchip had their reasons...
One other curiosity are the notes on the SPI schematic (referring to the PPS registers for the CLK pin)...
| Quote: | Note 1: Output selection for master mode
Note 2: Input selection for slave and master mode |
This suggests that it's actually the input that needs to be defined for both master and slave, and not the output. This of course is consistent with the first quote above. It's curious that CCS chose to make the clock output the mandatory #pin_select 
/Ross |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19520
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| Posted: Wed Jul 24, 2019 11:15 pm |
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Totally agreed.
The logic makes sense for a master. I suspect CCS simply felt that 99%
of systems would be masters, and decided to assume this was the case.
Slaves are rare. |
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