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Donatello
Joined: 21 Oct 2016 Posts: 22
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High speed PWM with incorrect frequency and jitter |
Posted: Tue Mar 06, 2018 12:16 pm |
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Hello programmers,
these days I'm using the dspic33EP64GS504 (CCS 5.076 and MPLAB 4.05), I want to generate a frequency of 500kHz but without success.
I have no problem for frequencies lower than 460kHz.
This is my code for a PWM of about 470kHz but it is very unstable because it continuously oscillates between two frequency values:
Code: | include <33EP64GS504.h>
#fuses ICSP1
#fuses NOJTAG
#fuses NOALTI2C1
#fuses NOALTI2C2
#fuses NOIOL1WAY
#fuses OSCIO
#fuses HS
#fuses PR_PLL
#fuses NOWDT
#fuses NOIESO
#fuses NOWRT
#fuses NOPROTECT
#fuses NOPWMLOCK
#use delay(CLOCK=140000000, CRYSTAL=8000000)
void main()
{
setup_oscillator(OSC_CRYSTAL);
setup_hspwm_unit(1, HSPWM_ENABLE | HSPWM_COMPLEMENTARY | HSPWM_TIME_BASE_FROM_PHASE_REGS | HSPWM_FAULT_MODE_DISABLED, 10, 10);
set_hspwm_phase(1, 118);
set_hspwm_duty(1, 40);
setup_hspwm(HSPWM_ENABLED | HSPWM_CLOCK_DIV_BY_1, 0xFFFF);
while(1);
} |
I would be very happy if someone can help me.
Regards,
Donatello
Last edited by Donatello on Tue Mar 06, 2018 2:42 pm; edited 1 time in total |
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temtronic
Joined: 01 Jul 2010 Posts: 9228 Location: Greensville,Ontario
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Posted: Tue Mar 06, 2018 12:52 pm |
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OK, I don't use 33 series PICs but..
shouldn't you have a 'clock= desired speed' line of code ?? |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19515
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Posted: Tue Mar 06, 2018 1:08 pm |
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Where is your clock statement?.
Without this the PLL won't be correctly programmed.
What is your crystal?.
How is a period of 0xFFFF going to give 460kHz?. This is out of spec for the chip 0x10 to 0xFFF8. |
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Donatello
Joined: 21 Oct 2016 Posts: 22
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Posted: Tue Mar 06, 2018 2:45 pm |
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temtronic wrote: | OK, I don't use 33 series PICs but..
shouldn't you have a 'clock= desired speed' line of code ?? |
You're right, in the "copy and paste" I missed delay instruction. Now, I edited my post. Sorry. |
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Donatello
Joined: 21 Oct 2016 Posts: 22
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Posted: Tue Mar 06, 2018 3:05 pm |
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Ttelmah wrote: |
How is a period of 0xFFFF going to give 460kHz?. This is out of spec for the chip 0x10 to 0xFFF8. |
I used HSPWM_TIME_BASE_FROM_PHASE_REGS and set_hspwm_phase, then I did not take the value into Period. Any value I put in the period does not change anything.
The time between two pulses of the PWM is never constant. Once it is 460kHz and after it is 480kHz, and so on.
I would also like to enable the auxiliary PLL because in the datasheet I should have a resolution of 1.04ns, but I do not understand how to enable it in CCS.
Thank you for help me. |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19515
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Posted: Wed Mar 07, 2018 2:29 am |
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OK. You are using the frequency from phase register setting. Unless you want multiple wave-forms with a phase shift it is easier to set the waveform from the period registers. However doing it as you are:
Code: |
#use delay(CLOCK=140MHz, CRYSTAL=8MHz, AUX:INTERNAL, CLOCK=120MHz)
//Critical. The auxiliary clock must be programmed.
//Look at Figure 5-1. Must also be using 1:1.
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Then your PTPER should be 470 for 500KHz.
Critical line is probably this one:
"A jitter can be seen on the PWM edges if PTPER is not divisible by 8."
Understand that this PWM expects a 120MHz source. The internal oscillator gives this at *16, your crystal won't. |
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Donatello
Joined: 21 Oct 2016 Posts: 22
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Posted: Wed Mar 07, 2018 6:12 am |
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I use this code, but the PWM is unstable.
Code: | include <33EP64GS504.h>
#fuses ICSP1
#fuses NOJTAG
#fuses NOALTI2C1
#fuses NOALTI2C2
#fuses NOIOL1WAY
#fuses OSCIO
#fuses HS
#fuses PR_PLL
#fuses NOWDT
#fuses NOIESO
#fuses NOWRT
#fuses NOPROTECT
#fuses NOPWMLOCK
#use delay(CLOCK=140MHz, CRYSTAL=8MHz, AUX:INTERNAL, CLOCK=120MHz)
void main()
{
setup_oscillator(OSC_CRYSTAL);
setup_hspwm_unit(1, HSPWM_ENABLE | HSPWM_COMPLEMENTARY | HSPWM_FAULT_MODE_DISABLED, 10, 10);
setup_hspwm(HSPWM_ENABLED | HSPWM_CLOCK_DIV_BY_1, 470);
set_hspwm_duty(1, 50);
while(1);
} |
The frequency is about 7.813kHz with period 470. If I use period 1470 the frequency is 2.5kHz.
The problem is always in jitter and in the frequency value.
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temtronic
Joined: 01 Jul 2010 Posts: 9228 Location: Greensville,Ontario
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Posted: Wed Mar 07, 2018 6:41 am |
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OK, I don't use that PIC but..
do you really ned this line of code ?
setup_oscillator(OSC_CRYSTAL);
perhaps it's doing 'something funny'... a compiler bug? conflicting setup ??
also
I'd add a '1HZ LED' code to your program and scope the LED. My thinking is the whole PIC, not just the PWM section is 'jittering'.
Maybe try at a lower speed, one not requiring the PLL and see if the problem goes away?
just trying to help you nail down WHERE the jitter's coming from.
If nothing else it should eliminate some things...
Jay |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19515
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Posted: Wed Mar 07, 2018 8:28 am |
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The Aux clock is not set correctly.
It may well be the setup oscillator line.
It's behaving as if Aux is running off Frc/2 without the Aux PLL.
The syntax for setup_oscillator on this chip family, requires both the source and the target frequency.
setup_oscillator(OSC_CRYSTAL, 140000000); |
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Donatello
Joined: 21 Oct 2016 Posts: 22
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Posted: Wed Mar 07, 2018 11:42 am |
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Ttelmah wrote: | It's behaving as if Aux is running off Frc/2 without the Aux PLL. |
In my dspic the auxiliary clock ACLK is the clock for ADC and PWM modules.
If I use:
Quote: | #use delay(CLOCK=140MHz, CRYSTAL=8MHz) |
Then the CCS:
- use internal oscillator (7.37MHz)
- not use 16x PLL in auxiliary clock
- auxiliary clock postscaler is 1:1
the clock frequency ACLK is the internal oscillator 7.37MHz.
If I use:
Quote: | #use delay(CLOCK=140MHz, CRYSTAL=8MHz, AUX:clock=XMHz)
Where X any value that does not generate an error during compilation (120, 118, 110, 60 and etc.). |
Then the CCS:
- use internal oscillator (7.37MHz)
- use 16x PLL in auxiliary clock
- auxiliary clock postscaler is 1:256
the clock frequency ACLK is 0.460MHz.
So the dspic will never work at 120MHz, but at most at the internal clock of 7.37MHz.
If I impose the prescaler at 1:1 (ACLK=118MHz!):
Quote: | #word ACLKCON = 0x0750
#bit APSTSCLR0 = ACLKCON.8
#bit APSTSCLR1 = ACLKCON.9
#bit APSTSCLR2 = ACLKCON.10
[...]
APSTSCLR0=1;
APSTSCLR1=1;
APSTSCLR2=1; |
The PWM does not work.
I believe the problem is that CCS compiler does not use AUX delay settings
correctly. But it is strange that nobody has used high frequency PWM. |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19515
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Posted: Wed Mar 07, 2018 12:32 pm |
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No, it is just that nobody has used it with your PIC.
Unfortunately just about every chip is different. I have used the hspwm, but using the master division, not the phase registers and the aux clock set as I posted. However, different chip.
You need to contact CCS. It is probable that there is some tiny tweak to the syntax needed for this chip, or some small problem in the settings being generated. |
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