Warning: PIC18F25K40 undocumented errata

[newguy]

Took half a day but I finally found out why something that worked, once moved to new pins because of a change in layout, works no longer.

If you configure pin B5 as an input and you have your programmer attached (ICD-U64 in my case), pin B5 will slowly change electrically as something charges on the die.

In desperation I stripped the program back to simply toggling pin C2, which controls a higher voltage drive circuit (~11V), and to which B5 is attached via a resistive divider. On an oscilloscope I could see the high voltage drive toggling and also B5 toggling in unison. But the processor would report a read of port b as 0x20 (B5 high) even if it wasn't (as verified on a scope). More maddening was that if I disconnected power for a time, the PIC would correctly report B5 as toggling for maybe ~3-4 seconds, and then it would slowly start "sticking" high, eventually becoming "permanently" so after perhaps 10-15 seconds of running.

In the "stuck" state, I measured ~2k resistance between B5 and B6 (which is the program clock line). B5 had no residual voltage either - it was 0V with respect to circuit ground. Once allowed to "discharge" for a few minutes, I get "megs" between B5 and B6. With my programmer disconnected, it's properly reporting the actual state of the line....for about an hour now.

There is no solder whisker bridging the lines, no flux, nothing. Externally, there is no electrical connection between B5 and any of the programming lines (/MCLR, PGC, PGD). I've never seen anything like this before. And yes, I opened a support ticket with Microchip.

[temtronic]

got ANY hair left ???

man I feel for you.

Jay

[guy]

Thanks for sharing this valuable information (also other posts you sent). When I see something weird the first place I turn to is this forum (available 24/7 )

[Ttelmah]

It sounds like you are saying the pin doesn't actually go high, but is 'seen' as high internally on a read?.
Would suggest that a FET is failing on the input gating/multiplexer.
It might be as simple as a faulty chip. Have you tried more than one example from different batches?.
Given the number of actual paths inside the chips now (PPS, ADC multiplexer, pull up resistors, interrupt on change etc.), such failures are really surprisingly rare. You talk about a high voltage drive. No possibility more current has been drawn than the input protection can take?. Generally the more modern chips have less margin than their older brethren...

[newguy]

Correct, the pin, externally, toggles between 0 and 5V. It reports pin reads as toggling for ~3-4s, then starts sticking high, and at about the ~12s mark it's locked high from then on. Unless you power down and leave it sit for several minutes, then the behaviour repeats. When in this locked state, the measured resistance between B5 and B6 is ~2k. Voltage from B5 or B6 to ground is 0V. This measured resistance is with the programmer disconnected. Over the course of ~ 1 minute, the resistance between B5 and B6 climbs to eventually be "megs". If the PIC is powered without the programmer attached, it behaves as it should. Attach the programmer, and reads of B5 eventually stick high despite the fact that, externally, B5 is being toggled between 0 and 5V every 250ms.

There is no external connection between B5 and B6. I did swap with a different PIC (same PIC18F25K40), and it behaved precisely the same way. Package is the 6x6mm QFN with exposed pad. Replacing that package isn't exactly easy, but with a hot air reflow "pencil" it's not too bad.

When I pulled the first PIC, I ensured that there were no bridges or any other detritus on the board that would bridge those pins. There wasn't. Measured resistance between those pads was "OL" on my multimeter. No electrical connection.

I placed the 2nd PIC and once it was soldered down I measured the resistance of all adjacent pads and all pads to ground. Everything "ohmed out" as "big".

The "sender circuit" the PIC drives is essentially a transistor-based "pull up" to 12V that only gets to ~11V. It has 3 modes: hard drive to ~11V, hard drive to 0V, and "float" to 10V. Addressing a sensor involves "hard drive", wait to allow the sensors to charge, then toggling the line low n times to address a specific sensor. Then the line is "released" which allows the sensor to send back its information by toggling the line low. When the transaction is complete, the line is taken low to stop the process. The "receive" pin on the PIC is connected to a resistor divider. Two 243k resistors, with an additional 150 ohm series resistor between the PIC and the "center tap" of the divider. There's plenty of margin on the R values to ensure that, worst case, the PIC's input will get ~ 25uA worth of input current (for about 5ms) if the signal level gets high enough for its input protection diodes to kick in. As I said previously, this is a proven design that works "in the real world". All I did was do a new layout and moved some lines around. The receive pin was B2 previously.

Is the resistive divider the best idea? No, but when you run the numbers you're realistically looking at ~25uA at worst input current to the pin for a few milliseconds. Again, I keep coming back to the fact that, on B2, this problem doesn't exist with the previous design.

[Ttelmah]

Was the second chip from the same batch?. Look at the data/plant codes on the chip.

In this sort of situation, I'd always look at sourcing a chip from a completely different supply route. In fact, given you are having a second problem that also seems to be an internal 'cross operation' with the chips, I'd be very suspicious you have some faulty units...

[newguy]

Same reel. Definitely going to order a few more to play with, but the faulty unit diagnosis seems very plausible. Only fly in the ointment is that we have functioning units that came from the same reel. Difference is that they use a slightly different layout on the PCB.

[Ttelmah]

You said though "moved to new pins". It may be some horrible little defect, perhaps related to a slight change in the voltages around the chip....

One thing. You talk about B5 being fed off a voltage divider. It is very bad practice indeed to have a logic input sitting for a long time in the transition region (the voltages between Vih and Vil). This can result in extra current in the gate, or even oscillation. If you want to have an event controlled by a voltage, it should instead be going to an analog input (either an ADC, or the a comparator).

[guy]

[newguy]

I know it's bad practice but the way that circuit is configured, it can be in only 3 possible states: driven high (~11V), driven low (0V), or floated (10V). Therefore the only 3 possible states at the PIC pin are 5.5V, 0V or 5V. It changes state "fast". I say fast because I've not measured the rise or fall time, but I know from looking at it on a scope at down to ~20us/div that it's pretty close to being "vertical".

Part of our stable of standard (for us) parts is a small SOT-23-5 package 2 input AND gate. I'm going to have the V divider feed that, and have the gate feed the PIC. I'm beginning to suspect power sequencing; because the PIC powers up with all pins configured as input, the V driver circuit will default to 10V out as soon as power comes up. If the main 5V rail lags this by any appreciable amount, I think that it may be possible that some weird latch up behaviour is taking place in certain parts of the die because it's being fed through B5's input protection diode. With an AND gate between the divider and the PIC, with both the gate and the PIC powered from the 5V rail, it's less possible for the PIC to get parasitically powered through an input pin.

Again, this wasn't an issue with B2 being connected to the divider, but with B5 it sure is. All depends what is on the die I suppose.

Now that I think about it, another "weirdness" that arose when I first powered up this new version of the PCB: A0, which I use as an analog input, wouldn't read anything but 0 even though I was measuring ~3V at its input. I had to explicitly configure its PPS to "latch" - which is the POR default - in order to get it to actually read the voltage at its input. That didn't happen with the previous layout either. Pins A1 and A2 are also analog inputs and they actually properly read their input voltages without having to touch their PPS registers.

[Ttelmah]

I have signals like this. I always add external clamp diodes. So the external voltage never tries to take the signal above the PIC's supply. Relying on the internal clamp diodes is particularly troublesome, when something else may be on the pin.
Now your interrupt reconfigure, was with timer2. I note that B5, is by default the gate input for timer1. I wonder if the protection on this pin is not actually that effective, and power is being routed through the timers to power the PIC. Try a simple clamp diode external to the PIC on the pin.

[guy]

External clamp diodes and TVS/zener diodes all clamp the voltage to a few hundred millivolts above VDD which leaves an unknown amount of current flowing through the built-in clamp diodes. Also their Vf changes slightly between parts so testing one board doesn't mean much.
I prefer to use a voltage divider set to less than Vdd, and add a TVS to protect from ESD (if possible, of course).

[Ttelmah]

A good Schottky diode will have a lower clamp voltage than the internal diodes.
However you also have the caveat of where the voltage actually 'goes' from here. So reverse diodes across the regulator for example will be needed if the system can be unpowered.

For the description, it sounds as if some current may be flowing in this circuit. Now you have to remember that if a divider circuit is designed to give (say) 4.5v when the main system is powered, when the power is off, this is going to be effectively just a resistor from the high voltage supply to nearly 0v, and much more current will be flowing.....

[newguy]

All good suggestions; thanks. I think that the addition of an AND gate along with a clamp to Vdd upstream of the gate should lick the problem. For what it's worth, I already did another layout to route that signal to B4 as well.

I saw the B5 -> T1 gate as well and I also tried explicitly setting T1 to an unused pin. No change in the "sticky high" behaviour, but I do remember that the first time I ran it after setting that PPS that it took longer to start to stick, which led to a false sense of self satisfaction that was short lived. Subsequent power cycles to "discharge" and re-test were about the same time frame.

I'm also going to add an additional power up delay (beyond what the PUT does). I've just never had any kind of weird behaviour with PICs - this has been a frustrating experience.

[newguy]

So from both simulation and from observations with an oscilloscope, the line that I suspected may be rising before the PIC's supply could rise...can't. Best it can do is rise at the same time as the PIC's supply, in sync with it. It can get 0.5V higher than the PIC's supply though.

I've done a modification to the layout and added the AND gate and two clamp zeners, before and after the AND gate. I also moved the line back to the PIC from B5 to B4. Hopefully that gets rid of this weirdness.