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mikedann
Joined: 16 Jul 2014 Posts: 6 Location: South Africa
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CLC - what am I missing? [solved] |
Posted: Tue Aug 22, 2017 3:53 am |
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Hi,
I am trying to get the CLC working using PIC16F18877 without any joy. Seems I must be missing something, can anyone help?
My basic code uses the NCO to send pulses to PIN_D1 and then I am trying use the same NCO as CLC1 input and simply replicate this input at the CLC1 output PIN_C5.
Thanks in advance,
Mike.
Code: |
/*
Filename: CLC_Test1.c
Current Version: 1.00
Current Version Date: 22/08/2017
Original/First Version Date: 15/08/2017
Compiler: CCS V5.074
Comments:
V1.00 To test the CLC.
Have NCO output working on PIN_D1 fine.
Cannot get NCO1 replicated on PIN_C5 through CLC no matter what I try?
*/
#CASE
#include <16F18877.h>
#fuses RSTOSC_HFINTRC
#fuses NOWDT
#fuses NOMCLR
#fuses NOLPBOR
#fuses NOBROWNOUT
#fuses NOLVP
#fuses PROTECT
#pin_select NCO1OUT=PIN_D1
#pin_select CLC1OUT=PIN_C5
#pin_select CLCIN0=PIN_C0
#use Delay(Clock=32MHZ)
void main()
{
setup_oscillator(OSC_HFINTRC_32MHZ);
setup_nco(NCO_ENABLED|NCO_FIXED_DUTY_MODE|NCO_CLOCK_HFINTOSC|NCO_ACTIVE_LOW,0); //Enable NCO
set_nco_inc_value(2000); //15.4kHz on D1
setup_clc1(CLC_ENABLED|CLC_MODE_AND);
clc1_setup_input(1,CLC_INPUT_NCO1);
clc1_setup_input(2,CLC_INPUT_CLCIN0);
clc1_setup_input(3,CLC_INPUT_CLCIN0);
clc1_setup_input(4,CLC_INPUT_CLCIN0);
//this makes output go low and stay low
clc1_setup_gate(1, CLC_GATE_CLEAR);
clc1_setup_gate(2, CLC_GATE_CLEAR);
clc1_setup_gate(3, CLC_GATE_CLEAR);
clc1_setup_gate(4, CLC_GATE_CLEAR);
do
{
output_toggle(PIN_E1); //flash LED
delay_ms(1000);
}
while(1);
}
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Last edited by mikedann on Tue Aug 22, 2017 12:57 pm; edited 1 time in total |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19520
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Posted: Tue Aug 22, 2017 9:00 am |
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When you set the gates up as clear, you are programming them to give 0 as outputs. Not surprising the final output goes low.....
This is horribly documented...
The data sheet comment here gives a start:
Quote: |
Programming the CLCx module is performed by
configuring the four stages in the logic signal flow. The
four stages are:
• Data selection
• Data gating
• Logic function selection
• Output polarity
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Now the logic function selection (and output polarity) are being dome by 'setup_clc'. Then the data selection is clc1_setup_input. It is now the gating that is the problem.
clc1_setup_gate(1, CLC_GATE_CLEAR);
sets the gate logic to give '0' out.
The selected inputs are gated, and then fed into the logic function.
So:
Code: |
setup_clc1(CLC_ENABLED|CLC_MODE_AND);
clc1_setup_input(1,CLC_INPUT_NCO1);
clc1_setup_input(2,CLC_INPUT_CLCIN0);
clc1_setup_input(3,CLC_INPUT_CLCIN0);
clc1_setup_input(4,CLC_INPUT_CLCIN0);
clc1_setup_gate(1, CLC_GATE_AND);
clc1_setup_gate(2, CLC_GATE_SET);
clc1_setup_gate(3, CLC_GATE_SET);
clc1_setup_gate(4, CLC_GATE_SET);
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This sets the first logic input to be the 'and' of the signals, and then feeds this (together with three logic 1's), into the main 'and' logic.
You speak about only mirroring the signal, but you are turning this on/off with PIN_C0. I hope this is what you intend?. |
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mikedann
Joined: 16 Jul 2014 Posts: 6 Location: South Africa
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Posted: Tue Aug 22, 2017 9:59 am |
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Thank you for your rapid comment, I appreciate it.
I did as you suggested and understand the reasoning, but I still get the same result - C5 remains at 0, with C0 at 0V or +5V.
(from what I can understand if CLC_IN0 is not configured via PPS, then it seems to be 0, but this is not absolutely clear to me (see the Microchip Code configurator output). I just wanted to eliminate this as a possible problem and so I have assigned it and can set it to 0 or 1, with no effect).
Thanks again.... |
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mikedann
Joined: 16 Jul 2014 Posts: 6 Location: South Africa
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Thanks Richard CCS |
Posted: Tue Aug 22, 2017 1:01 pm |
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Received a fast reply that there was some compiler issue -
I now have a work-around that works ! Thanks to all.
Hard to imagine that me, a 61 year-old (fart) in Johannesburg was one of the few to pick this up?
Thanks Richard..... |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19520
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Posted: Tue Aug 22, 2017 1:49 pm |
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OK.
I had just spent some time investigating, and found that they are only putting 4 bits into the CLC select register. Can understand this since few CLC peripherals have this many selections.
Try with this:
Code: |
#byte clc1sel0=getenv("SFR:clc1sel0")
#byte clc1sel1=getenv("SFR:clc1sel1")
#byte clc1sel2=getenv("SFR:clc1sel2")
#byte clc1sel3=getenv("SFR:clc1sel3")
void main()
{
setup_oscillator(OSC_HFINTRC_32MHZ);
setup_nco(NCO_ENABLED|NCO_FIXED_DUTY_MODE|NCO_CLOCK_HFINTOSC|NCO_ACTIVE_LOW,0); //Enable NCO
set_nco_inc_value(2000); //15.4kHz on D1
setup_clc1(CLC_ENABLED|CLC_MODE_AND);
clc1sel0=CLC_INPUT_NCO1;
clc1_setup_input(2,CLC_INPUT_CLCIN0);
clc1_setup_input(3,CLC_INPUT_CLCIN0);
clc1_setup_input(4,CLC_INPUT_CLCIN0);
//this makes output go low and stay low
clc1_setup_gate(1, CLC_GATE_CLEAR);
clc1_setup_gate(2, CLC_GATE_CLEAR);
clc1_setup_gate(3, CLC_GATE_CLEAR);
clc1_setup_gate(4, CLC_GATE_CLEAR);
do
{
output_toggle(PIN_E1); //flash LED
delay_ms(1000);
}
while(1);
}
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This may be the fix they have given you?.
Only the NCO1 selection requires the extra bits. |
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mikedann
Joined: 16 Jul 2014 Posts: 6 Location: South Africa
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The answer from support@ccsinfo.com which works ! |
Posted: Wed Aug 23, 2017 9:32 am |
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Hello,
Once again thanks for your interest and valuable advice.
For completeness, here is the code which works (very similar to your advice).
Code: | /*
Filename: CLC_Test3.c
Current Version: 1.00
Current Version Date: 22/08/2017
Original/First Version Date: 15/08/2017
Compiler: CCS V5.074
Comments:
V1.00 To test the CLC.
Have NCO output working on PIN_D1 fine.
Cannot get NCO1 replicated on PIN_C5 through CLC no matter what I try? [works now !]
*/
#CASE
#include <16F18877.h>
#fuses RSTOSC_HFINTRC
#fuses NOWDT
#fuses NOMCLR
#fuses NOLPBOR
#fuses NOBROWNOUT
#fuses NOLVP
#fuses PROTECT
#pin_select NCO1OUT=PIN_D1
#pin_select CLC1OUT=PIN_C5
#pin_select CLCIN0=PIN_C0
#use Delay(Clock=32MHZ)
#byte CLC1SEL0 = getenv("SFR:CLC1SEL0")
#byte CLC1SEL1 = getenv("SFR:CLC1SEL1")
#byte CLC1SEL2 = getenv("SFR:CLC1SEL2")
#byte CLC1SEL3 = getenv("SFR:CLC1SEL3")
void main()
{
setup_oscillator(OSC_HFINTRC_32MHZ);
setup_nco(NCO_ENABLED|NCO_FIXED_DUTY_MODE|NCO_CLOCK_HFINTOSC|NCO_ACTIVE_LOW,0); //Enable NCO
set_nco_inc_value(2000); //15.4kHz on D1
setup_clc1(CLC_ENABLED|CLC_MODE_AND);
//This runs the NCO output to C5 switched on and off using C0
CLC1SEL0 = CLC_INPUT_NCO1;
CLC1SEL1 = CLC_INPUT_CLCIN0;
CLC1SEL2 = CLC_INPUT_CLCIN0;
CLC1SEL3 = CLC_INPUT_CLCIN0;
clc1_setup_gate(1, CLC_GATE_AND);
clc1_setup_gate(2, CLC_GATE_SET);
clc1_setup_gate(3, CLC_GATE_SET);
clc1_setup_gate(4, CLC_GATE_SET);
do
{
output_toggle(PIN_E1); //flash LED
delay_ms(1000);
}
while(1);
} |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19520
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Posted: Wed Aug 23, 2017 1:09 pm |
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I tried it with the four registers, but found the existing commands were happily accepting device addresses up to 15. Only NCO1 has an address above this. hence my only using the one extra selection.
If you look at all the older chips, even the PIC24's with this peripheral, only support 8 input numbers normally, so can see how this got missed. The problem only appears if you are using a peripheral with a higher selection value... |
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