![](templates/subSilver/images/CCSLogo.jpg) |
![CCS C Software and Maintenance Offers](templates/subSilver/images/forumAd6.jpg) |
View previous topic :: View next topic |
Author |
Message |
stoyanoff
Joined: 20 Jul 2011 Posts: 375
|
Error interrupts usage? |
Posted: Wed Jan 14, 2015 4:02 am |
|
|
Greetings! Can you give me an example for INT_OSCFAIL, INT_ADDRERR, INT_STACKERR, INT_MATHERR, INT_DMAERR?
I have a small question! If I have an oscillator failure then what will provide frequency for execution of the interrupt?!
Thanks! |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19375
|
|
Posted: Wed Jan 14, 2015 4:52 am |
|
|
For the clock, the internal oscillator.
This is all down to how you have your chip configured, and what you are actually trying to do.
For the address error, this should never happen if the code is written correctly, but if (for instance) you are using pointer/array accesses and talk outside the range of the array, then you may trigger an address error (depending where you access). Or (more common), if you generate a pointer to a 16bit value, and then try to talk to an odd memory address (16bit accesses can only be done to an even address). There was quite a long thread not that long ago, where a user was getting this error, covering 'how to use the interrupt'.
For the clock error, you can only use this if you are running off an external clock source. The chip can then be setup to give you the interrupt if your external clock fails. Obviously your clock rate won't then be the expected 'running' rate, but the chip can still function.
Generally the best place to start is the chip's data sheet, where the manufacturer will tell you what triggers these events, and particularly the 'family reference manual'.
The MATHERR occurs with some types of maths overflow (/0 for example).
The DMAERR occurs when for example a USB transfer is setup, and then the count field is less than the number of bytes actually received.
Obviously in each case quite complex code is needed to 'recover' in any way other than catastrophically. However for debugging, these can be very useful. |
|
![](templates/subSilver/images/spacer.gif) |
stoyanoff
Joined: 20 Jul 2011 Posts: 375
|
|
Posted: Thu Jan 15, 2015 1:10 am |
|
|
If I have interrupt priority set, do I have to set priority to this interrupts?
For example:
Thanks! |
|
![](templates/subSilver/images/spacer.gif) |
Ttelmah
Joined: 11 Mar 2010 Posts: 19375
|
|
Posted: Thu Jan 15, 2015 1:29 am |
|
|
Read the data sheet. Most of these are _traps_ not conventional interrupts (so won't be disabled by a DISI instruction). As such above the highest priority in the normal table. Their internal 'priority' order is OSC, ADDR, STACK, MATH. |
|
![](templates/subSilver/images/spacer.gif) |
|
|
You cannot post new topics in this forum You cannot reply to topics in this forum You cannot edit your posts in this forum You cannot delete your posts in this forum You cannot vote in polls in this forum
|
Powered by phpBB © 2001, 2005 phpBB Group
|