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mvanvliet
Joined: 02 Jun 2009
Posts: 123
Location: The Netherlands
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| 12F1572 PWM mode synchronisation |
 Posted: Thu Sep 25, 2014 1:17 am |
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I'm playing with an 12F1572 to make two PWM signals which are synchronized, but it won't work and the names in the datasheet are different then in the compiler.
Is there someone who has did something with these PWM modes and can help me a bit.
PWM is working, duty cycle is 50%, but they aren't synchronized.
CCS version: 5.026
| Code: | #include <12F1572.h>
#device ADC=8
#FUSES NOPROTECT
#FUSES NOWDT //No Watch Dog Timer
#FUSES NOBROWNOUT //No brownout reset
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
#FUSES NOMCLR
#FUSES NOPUT
#use delay(internal=8000000)
void main() {
output_low(PIN_A2);
output_low(PIN_A4);
setup_oscillator(OSC_16MHZ);
setup_comparator(NC_NC);
setup_DAC(DAC_OFF);
setup_vref(VREF_OFF);
setup_adc_ports(ADC_OFF);
setup_adc(ADC_CLOCK_DIV_16);
setup_timer_0(T0_internal|T0_DIV_256);
setup_timer_2(T2_DIV_BY_1,255,1);
setup_PWM1(PWM_enabled|PWM_STANDARD|PWM_CLK_FOSC|PWM_OUTPUT|PWM_PWM1_A5);
setup_PWM2(PWM_enabled|PWM_STANDARD|PWM_CLK_FOSC|PWM_OUTPUT|PWM_PWM2_A4|PWM_OFFSET_MODE_CONTINUOUS|PWM_OFFSET_TRIGGER_OF1);
//setup_CWG(CWG_ENABLED|CWG_OUTPUT_A|CWG_OUTPUT_B|CWG_INPUT_PWM1|CWG_CWG1B_A4|CWG_CWG1A_A2|CWG_CLOCK_HFINTOSC, CWG_NO_AUTO_SHUTDOWN, 0, 0);
while(1)
{
set_PWM1_Duty(64);
set_PWM1_Period(128);
set_PWM1_phase(0);
set_PWM1_offset(0);
set_PWM2_Duty(64);
set_PWM2_Period(128);
set_PWM2_phase(0);
set_PWM2_offset(0);
}
}
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Last edited by mvanvliet on Thu Oct 09, 2014 1:09 am; edited 1 time in total |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19503
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| Posted: Thu Sep 25, 2014 3:22 am |
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Several things:
The first is 'stop changing things'....
The duty, and pulse width update on the 'next' cycle. You are continuously changing them, so each cycle is effectively a 'first' cycle of the PWM. You need to make the settings, then pause, and see what the PWM does. Synchronisation occurs at the end of the PWM cycle.
The CCS modes:
PWM_OFFSET_MODE_CONTINUOUS
PWM_OFFSET_MODE_ONE_SHOT
PWM_OFFSET_MODE_INDEPENDENT_SLAVE
PWM_OFFSET_MODE_INDEPENDENT
Correspond to 'Continuous run slave mode, with sync start and timer reset', 'slave run mode with sync start', 'one shot slave mode with sync start', and 'independant run mode' respectively. Look at figures 22-8, to 22-11 in the data sheets to work out which one you want. Notice how in the continuous mode, there is no change in the waveform, till the third cycle in the second PWM. Then think about the fact you are continuously changing the settings.... |
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mvanvliet
Joined: 02 Jun 2009
Posts: 123
Location: The Netherlands
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| Posted: Mon Sep 29, 2014 3:48 am |
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I've read the datasheet (again) and tried some code, but it isn't working like I would.
When I try to make 2 PWM signals with the same duty cycle and no offset or phase both PWM signals aren't synchronized.
If I try to make an center aligned signal with incrementing timer there is also an phase shift in both PWM signals (mostly 2.8 microseconds).
I've put the duty cycle settings before the while loop to prevent Ttelmah's issues.
| Code: | #include <12F1572.h>
#device ADC=8
#FUSES NOPROTECT
#FUSES NOWDT //No Watch Dog Timer
#FUSES NOBROWNOUT //No brownout reset
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
#FUSES NOMCLR
#FUSES NOPUT
#use delay(internal=16000000)
void main() {
output_low(PIN_A2);
output_low(PIN_A4);
setup_oscillator(OSC_16MHZ);
setup_comparator(NC_NC);
setup_DAC(DAC_OFF);
setup_vref(VREF_OFF);
setup_adc_ports(ADC_OFF);
setup_adc(ADC_CLOCK_DIV_16);
setup_timer_0(T0_internal|T0_DIV_256);
setup_timer_2(T2_DIV_BY_1,255,1);
setup_PWM1(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_FOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT|PWM_PWM1_A5);
setup_PWM2(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_FOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT|PWM_PWM2_A4|PWM_OFFSET_MATCH_INCREMENTING);
//setup_CWG(CWG_ENABLED|CWG_OUTPUT_A|CWG_OUTPUT_B|CWG_INPUT_PWM1|CWG_CWG1B_A4|CWG_CWG1A_A2|CWG_CLOCK_HFINTOSC, CWG_NO_AUTO_SHUTDOWN, 0, 0);
setup_CWG(CWG_disabled, 0, 0, 0);
set_PWM1_Duty(64);
set_PWM1_Period(128);
set_PWM1_phase(0);
set_PWM1_offset(0);
set_PWM2_Duty(64);
set_PWM2_Period(128);
set_PWM2_phase(0);
set_PWM2_offset(0);
while(1)
{
}
} |
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bschriek
Joined: 18 Dec 2007
Posts: 80
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| 12F1572 pwm |
| Posted: Tue Oct 07, 2014 5:38 am |
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Same problem as mr van Vliet, PWM signals are not synchronized!
And for my half-bridge converter I need 2 synchronized pulses with
a variable duty cycle from about 10% to 90%.
How can I synchronize PWM1 and PWM2 like the example underneath?
Ch3 is an optional channel and added for test purposes.
Please help me to find the right "setup_PWMx" commands.
Compiler version 5.025
| Code: |
#include <12F1572.h>
#device ADC=8
#FUSES NOPROTECT
#FUSES NOWDT //No Watch Dog Timer
#FUSES BROWNOUT //No brownout reset
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
#FUSES MCLR //External pull-up resistor with reset button to ground.
#FUSES NOPUT
#use delay(internal=16000000)
int i = 0;
void main() {
output_low(PIN_A2);
output_low(PIN_A4);
setup_oscillator(OSC_16MHZ);
setup_comparator(NC_NC);
setup_DAC(DAC_OFF);
setup_vref(VREF_OFF);
setup_adc_ports(ADC_OFF);
setup_adc(ADC_CLOCK_DIV_16);
setup_timer_0(T0_internal|T0_DIV_256);
setup_timer_2(T2_DIV_BY_1,255,1);
setup_CWG(CWG_disabled, 0, 0, 0);
setup_PWM1(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_FOSC|PWM_CLK_DIV_BY_8|PWM_OUTPUT|PWM_PWM1_A5);
setup_PWM2(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_FOSC|PWM_CLK_DIV_BY_8|PWM_OUTPUT|PWM_PWM2_A4|PWM_OFFSET_MODE_CONTINUOUS|PWM_OFFSET_MATCH_INCREMENTING|PWM_OFFSET_TRIGGER_OF1);
setup_PWM3(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_FOSC|PWM_CLK_DIV_BY_8|PWM_OUTPUT |PWM_OFFSET_MODE_CONTINUOUS|PWM_OFFSET_MATCH_INCREMENTING|PWM_OFFSET_TRIGGER_OF1);
///////////////////////////////////////////////////////////////////////////////
// Special half-bridge with variable duty cycle up to 80% !
// PWM1TMR1 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 MASTER
// Duty1 _ _ _ _ _ 1 1 1 1 _ _ _ _ _ _ _ _ _ _ 1 1 1 1 _ _ _ _ _ _ _ _ _ _ 1 1
// PWM2TMR 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 SLAVE (duty2=duty1) (phase2=phase1+180°)
// Duty2 1 1 _ _ _ _ _ _ _ _ _ _ 1 1 1 1 _ _ _ _ _ _ _ _ _ _ 1 1 1 1 _ _ _ _ _
// PWM3TMR 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 Another slave, optional but enabled for test purpose
// Duty3 1 1 1 _ _ _ _ _ _ _ _ 1 1 1 1 1 1 _ _ _ _ _ _ _ _ 1 1 1 1 1 1 _ _ _ _
set_PWM1_Period(6); //
set_PWM1_Duty(2); //
set_PWM1_phase(2); //
set_PWM1_offset(0); //
set_PWM2_Period(6); //
set_PWM2_Duty(2); //
set_PWM2_phase(0); //
set_PWM2_offset(0); //
set_PWM3_Period(6); //
set_PWM3_Duty(3); //
set_PWM3_phase(0); //
set_PWM3_offset(0); //
while(1)
{
set_PWM1_Duty(i); //
set_PWM2_Duty(i); //
i=i+1;
if (i>4)
{
i=1; // i can be used to test different values for example duty cycles.
}
delay_ms(1000);
}
} |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Tue Oct 07, 2014 10:49 pm |
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I've added a 12F1572 to an existing order. It's only $0.83 USD.
I'll get it by the end of the week. If no one else helps you by then, I'll
look at the problem. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19503
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| Posted: Wed Oct 08, 2014 1:18 am |
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I was thinking of a similar thing, but hadn't got round to it yet... 
I suspect the chips are not designed to give 'start' alignment this way.
I'd want to try the following settings:
| Code: |
//Not trying to centre align at this point - KISS
setup_PWM1(PWM_enabled||PWM_CLK_FOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT|PWM_PWM1_A5);
setup_PWM2(PWM_enabled||PWM_CLK_FOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT|PWM_PWM2_A4|PWM_OFFSET_MODE_CONTINUOUS);
set_PWM1_Duty(64);
set_PWM1_Period(128);
set_PWM1_phase(0);
set_PWM2_Duty(32); //so one can see it is different from PWM1
set_PWM2_Period(128);
set_PWM2_phase(0);
set_PWM2_offset(127);
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I suspect the slaved PWM, always starts, the clock _after_ it's sync point, so To actually start at cycle 0, you'd effectively have to trigger it at cycle -1 (one less than the period of the other).
Worth a try.
Also worth trying offset=128.
Best Wishes |
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bschriek
Joined: 18 Dec 2007
Posts: 80
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| Posted: Wed Oct 08, 2014 5:04 am |
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Dear mr PCM programmer,
Thank you in advance for your help,
In the meantime we also tried to find a solution to make pwm1 and pwm2 suitable
for our special push-pull converter with more than 50% duty cycle.
We modified the timing to become closer to our real application.
Underneath some information concerning the new program.
Period: pwm1, pwm2 and pwm3 = 50kHz exactly.
Duty: pwm1 and pwm can change from 0% to 100%.
Delay: the center of pwm2 is delayed exactly 10µSec compared to pwm1 (phase of exactly 180°).
You can use pmw3 to trigger your oscilloscope to get a good picture of pwm1 and pwm2.
We managed this by loading the PWMxTMRL/H registers to synchronize and create the 180° phase for pwm2.
A negative offset is required to obtain the 180° phase of pwm2 because a PWM2TMRL offset of 160 doesn't work.
Off course here the position of the PWMxEN instructions are important, don't change the order or you can start with trial and error again.
But this is a weak firmware solution by trial and error, I hope there is a hardware solution for it.
As you can see all setup_pwm commands don't have any synchronization in the command line anymore.
And if there is no hardware solution I will use the normal pwm settings to get the double duty cycle resolution.
Best regards,
Bas
| Code: |
#include <12F1572.h>
#device ADC=8
#FUSES NOPROTECT
#FUSES NOWDT //No Watch Dog Timer
#FUSES BROWNOUT //No brownout reset
#FUSES NOLVP //No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
#FUSES MCLR //External pull-up resistor with reset button to ground.
#FUSES NOPUT
#use delay(internal=16000000)
#byte PWM1TMRL = getenv("SFR:PWM1TMRL")
#byte PWM1TMRH = getenv("SFR:PWM1TMRH")
#byte PWM2TMRL = getenv("SFR:PWM2TMRL")
#byte PWM2TMRH = getenv("SFR:PWM2TMRH")
#byte PWM3TMRL = getenv("SFR:PWM3TMRL")
#byte PWM3TMRH = getenv("SFR:PWM3TMRH")
#bit PWM1EN = getenv("bit:PWM1EN")
#bit PWM2EN = getenv("bit:PWM2EN")
#bit PWM3EN = getenv("bit:PWM3EN")
int i = 0;
void main() {
output_low(PIN_A2);
output_low(PIN_A4);
setup_oscillator(OSC_16MHZ);
setup_comparator(NC_NC);
setup_DAC(DAC_OFF);
setup_vref(VREF_OFF);
setup_adc_ports(ADC_OFF);
setup_adc(ADC_CLOCK_DIV_16);
setup_timer_0(T0_internal|T0_DIV_256);
setup_timer_2(T2_DIV_BY_1,255,1);
setup_CWG(CWG_disabled, 0, 0, 0);
setup_PWM1(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_HFINTOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT|PWM_PWM1_A5);
setup_PWM2(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_HFINTOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT|PWM_PWM2_A4);
setup_PWM3(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_HFINTOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT );
//setup_PWM2(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_HFINTOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT|PWM_PWM2_A4|PWM_OFFSET_MODE_CONTINUOUS|PWM_OFFSET_MATCH_DECREMENTING|PWM_OFFSET_TRIGGER_OF1|PWM_LOAD_TRIGGER_LD1);
//setup_PWM3(PWM_enabled|PWM_CENTER_ALIGN|PWM_CLK_HFINTOSC|PWM_CLK_DIV_BY_1|PWM_OUTPUT |PWM_OFFSET_MODE_CONTINUOUS|PWM_OFFSET_MATCH_DECREMENTING|PWM_OFFSET_TRIGGER_OF1|PWM_LOAD_TRIGGER_LD1);
///////////////////////////////////////////////////////////////////////////////
// Special half-bridge with variable duty cycle up to 80% !
// PWM1TMR1 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 MASTER
// Duty1 _ _ _ _ 1 1 1 1 1 1 _ _ _ _ _ _ _ _ 1 1 1 1 1 1 _ _ _ _ _ _ _ _ 1 1 1
// PWM2TMR 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 SLAVE (duty2=duty1) (phase2=phase1+180°)
// Duty2 1 1 1 _ _ _ _ _ _ _ _ 1 1 1 1 1 1 _ _ _ _ _ _ _ _ 1 1 1 1 1 1 _ _ _ _
// PWM3TMR 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 6 5 4 3 2 1 0 0 1 2 3 4 5 6 Another slave, optional but enabled for test purpose
// Duty3 1 _ _ _ _ _ _ _ _ _ _ _ _ 1 1 _ _ _ _ _ _ _ _ _ _ _ _ 1 1 _ _ _ _ _ _
set_PWM1_Period(159); //
set_PWM1_Duty(20); //
set_PWM1_phase(0); //
set_PWM1_offset(0); //
set_PWM2_Period(159); //
set_PWM2_Duty(20); //
set_PWM2_phase(0); //
set_PWM2_offset(0); //
set_PWM3_Period(159); //
set_PWM3_Duty(1); //
set_PWM3_phase(0); //
set_PWM3_offset(0); //
PWM1EN = 0;
PWM2EN = 0;
PWM3EN = 0;
/*
//// use this to exactly synchronize all 3pms at 0° phase ////
PWM1TMRL = 0; //
PWM1TMRH = 0; //
PWM2TMRL = 4; // positive offset for pwm2.
PWM2TMRH = 0; //
PWM3TMRL = 8; // positive offset for pwm3.
PWM3TMRH = 0; //
*/
//// use this for the 180° phase of pwm2 ////
PWM1TMRL = 250; // negative offset for pwm1.
PWM1TMRH = 255; // negative offset for pwm1.
PWM2TMRL = 158; // 158 to create the required 180° phase shift.
PWM2TMRH = 0;
PWM3TMRL = 2; // positive offset for pwm3.
PWM3TMRH = 0; // positive offset for pwm3.
PWM1EN = 1;
PWM2EN = 1;
PWM3EN = 1;
while(1)
{
set_PWM1_Duty(i); // 80 agrees to 50% duty cycle exactly.
set_PWM2_Duty(i); // 80 agrees to 50% duty cycle exactly.
if (i>10 && i<70 || i>90 && i<150) //zoom function at low, 50% and high duty cycle.
i=i+10;
else i=i+1;
if (i>160)
i=0;
delay_ms(500);
}
} |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Thu Oct 16, 2014 4:09 pm |
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I experimented with this chip and the code below appears to be the
minimum necessary to produce two channels of synchronized center-
aligned PWM. I commented out two lines in the slave channel setup
because they don't appear to affect the waveforms. There might be
other lines that could be removed, but at least this code is enough
to get your program working.
Note that in the slave setup, there is a comma separating the first set
of parameters from the 2nd set. This is per the 12F1572.h file.
| Code: |
#include <12F1572.h>
#fuses INTRC_IO, NOWDT, BROWNOUT
#use delay(internal=16M)
//=========================
void main()
{
int8 i;
setup_timer_2(T2_DIV_BY_1, 255, 1);
setup_pwm1(PWM_ENABLED|PWM_CENTER_ALIGN|PWM_CLK_FOSC|PWM_CLK_DIV_BY_8|PWM_OUTPUT
| PWM_PWM1_A5 );
setup_pwm2(PWM_ENABLED|PWM_CENTER_ALIGN|PWM_CLK_FOSC|PWM_CLK_DIV_BY_8|PWM_OUTPUT
| PWM_PWM2_A4
, PWM_OFFSET_INT_ENABLED
// | PWM_LOAD_BUFFERS_ON_TRIGGER
// | PWM_LOAD_TRIGGER_LD1
| PWM_OFFSET_MODE_INDEPENDENT_SLAVE
| PWM_OFFSET_MATCH_INCREMENTING
| PWM_OFFSET_TRIGGER_OF1
);
set_pwm1_period(128);
set_pwm1_phase(0);
set_pwm1_offset(0);
set_pwm2_period(128);
set_pwm2_phase(0);
set_pwm2_offset(0);
// Ramp up the duty cycle to demonstrate it on a scope.
for(i=0; i < 128; i++)
{
set_pwm1_duty(i/2);
set_pwm2_duty(i);
delay_ms(100);
}
delay_ms(500);
// Now ramp it up again, but more slowly with fewer steps.
while(TRUE)
{
for(i=32; i < 64; i+=8)
{
set_pwm1_duty(i/2);
set_pwm2_duty(i);
delay_ms(1000);
}
}
} |
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