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Need help with displaying image on a 640x480 screen!!!

 
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Hariharan



Joined: 18 Sep 2014
Posts: 1

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Need help with displaying image on a 640x480 screen!!!
PostPosted: Thu Sep 18, 2014 6:04 am     Reply with quote

Hey guys,

I am new to ccs. I am working on a project with pic18f4431@20Mhz
I have interfaced a 640x480 tft screen. coded the font library and everything looks good.

i wanted to display a image on the screen, i actually coded that too.

but my problem is that its takes seriously too much time to display.

Yeah! i do know that its really absurd to use 20Mhz microcontroller to display a graphic intensive process, but i've seen people do that on some machines and when i opened those all i see is a microcontroller.

1)is there a way to display images that large on a display using microcontroller?

2) do i have a choice(like adding extra hardware of some sort to send data over to the screen, something like the bios screen that you see when the PC boots)

I believe even with a microcontroller operating @80+ Mhz will take more than 3 s to display a image with a resolution of 200x200(i tried).

And yeah, i do use hex codes for placing colors (pixel by pixel) to make the whole image.

i used online resources like http://www.digole.com/tools/PicturetoC_Hex_converter.php

I am fine with the code. just wanted to know of there is a way to display image that quickly.

thanks in advance.
Ttelmah



Joined: 11 Mar 2010
Posts: 19480

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PostPosted: Thu Sep 18, 2014 8:09 am     Reply with quote

As has been said here in the past, the PIC, is at heart the wrong tool for the job.

'Microcontroller', covers a huge variety of chips with different aims and abilities.
The 'point' about the PIC, is that internally it has a very easy to build architecture (low gate count, for the abilities), which makes it very cheap (especially in larger quantities), and allows simultaneous access to ROM and RAM, without the cost of cache. However one 'cost' paid for this 'Harvard architecture', is that it limits it's RAM space, and prevents on most chips other memories being mapped into this space. 'Linear' architecture chips (Von Neumann architecture), are much better suited for doing anything involving large amounts of data.
It is trying to use a screwdriver to do up a nut. It may be 'possible', but it's far easier to use a spanner....

You should be able to go much faster than you describe, even with the PIC but this is all down to how your hardware is done. I've done graphic greyscale displays in the past, which can update the entire display (48000 bytes), from external ROM, in under 1/20th second. This was done using an FPGA, to generate the address, and automatically increment it for each write, with byte wide writes to this.
ezflyr



Joined: 25 Oct 2010
Posts: 1019
Location: Tewksbury, MA

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PostPosted: Tue Sep 30, 2014 8:09 am     Reply with quote





+++++++++++++++++++++
ezflyer,

faheem aka danny500 is a net-wide forum spammer
and is now banned.

- Forum Moderator
+++++++++++++++++++++


Last edited by ezflyr on Tue Sep 30, 2014 8:10 am; edited 1 time in total
temtronic



Joined: 01 Jul 2010
Posts: 9216
Location: Greensville,Ontario

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PostPosted: Tue Sep 30, 2014 8:09 am     Reply with quote

It's NOT 'Harvard' that limits RAM , rather the market demands. When PICs first come out, RAM was costly and programmers KNEW how to achieve great working code with small RAM, ROM and EPROM. Since then design and manufacturing is super cheap and PICs tend to be 'configured' for certain markets or products.
I've yet to run out of RAM after 20+ years though I tend to use bigger PICs than others.There's always the need for 'just-one-more-I/O pin' and to redesign a PCB from a 28 to 40 pinner is crazy !

jay
Ttelmah



Joined: 11 Mar 2010
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PostPosted: Wed Oct 01, 2014 4:00 am     Reply with quote

The point about Harvard versus Von Neumann, is that on the former, the RAM and ROM address spaces are separate. As such, twice as many lines needed for address and data. Hence it becomes near impractical to bring these out of the chip. Without these being brought out of the chip, the display memory can't be mapped directly into the address space of the processor, so access becomes slower, and data for the display has to be held in the PIC's RAM, and transferred for display, which generally is rather limited for something as large as this display, and brings a very large speed penalty.

Now there are a few PIC's with EMI (external memory interface), like the 18Fxxx models, and these can be used much better for this type of thing, but the it is the ROM address/data busses that are brought 'out', so access still has to be via TBLWRT, making it still a lot slower than talking to the memory on a Von Neumann design.

It is a 'less suited' architecture for this type of application.
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