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alfaec
Joined: 26 Jul 2012
Posts: 5
Location: pistoia
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| PIC24 doesn't wake up with WDST |
 Posted: Fri Mar 28, 2014 10:26 am |
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Here is my problem.
I'm using PIC24FV32KA302 with CCS PCD 5 and i'm testing Wake Up from Deep Sleep using DS Watchdog.
Attached you can find my simple test code.
I don't understand what are not running, because one time hardware go to sleep, it could not wake up using internal watch dog deep sleep functionality.
Can someone tell me where i'm wrong?
What's your running source code with this PIC?
If i use Wake Up from Deep Sleep using EXT INT0, everything is working properly.
| Code: | #include <24FV32KA302.h> // compiler include
#word rRCON = 0x0740
int16 wRCON;
#locate wRCON = 0x0740
#fuses NOBROWNOUT
#fuses NOPUT
#fuses DSWDT, DSWDT32
#use delay(internal=8M)
#use fast_io(ALL)
void go_2_sleep(void) {
sleep(SLEEP_FULL);
reset_cpu(); // IRRELEVANT
}
void main(void) {
setup_oscillator(OSC_INTERNAL, 8000000);
#asm
BCLR wRCON,#10 // RESET DPSLP (RCON<10>)
BCLR wRCON, #0 // RESET RELEASE (RCON<0>)
#endasm
set_tris_a(0x77); // MY TEST BOARD
set_tris_b(0x45FE); // MY TEST BOARD
unsigned int16 i;
for (i=0; i<0xf000; i++) {
#asm
NOP
NOP
NOP
#endasm
}
go_2_sleep();
} |
Thanks
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Alessio Fabbri |
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rikotech8
Joined: 10 Dec 2011
Posts: 376
Location: Sofiq,Bulgariq
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| re |
| Posted: Fri Mar 28, 2014 11:05 am |
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Try to enable WDT in software.
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A person who never made a mistake never tried anything new. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19331
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| Posted: Fri Mar 28, 2014 11:39 am |
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If you don't fiddle around with assembler, and let the compiler locate things, you find an error at once:
| Code: |
#include <24FV32KA302.h> // compiler include
#bit DPSLP=getenv("BIT:DPSLP")
#bit RELEASE=getenv("BIT:RELEASE")
#fuses NOBROWNOUT
#fuses NOPUT
#fuses DSWDT, DSWDT32, DSWDTCK_LPRC
#use delay(internal=8M)
#use fast_io(ALL)
void go_2_sleep(void) {
sleep(SLEEP_FULL);
reset_cpu(); // IRRELEVANT
}
void main(void) {
setup_oscillator(OSC_INTERNAL, 8000000);
DPSLP=FALSE;
RELEASE=FALSE;
set_tris_a(0x77); // MY TEST BOARD
set_tris_b(0x45FE); // MY TEST BOARD
unsigned int16 i;
for (i=0; i<0xf000; i++) {
delay_cycles(3);
}
go_2_sleep();
}
|
If you look at the listing, you see:
| Code: |
....................
.................... DPSLP=FALSE;
0236: BCLR.B 741.2
.................... RELEASE=FALSE;
0238: BCLR.B 758.0
....................
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Note the different register address.
your code reset RCON:0, which is POR, not RELEASE.....
I also explicitly select the LPRC oscillator, It _should_ default to this, but never _assume_ defaults. 
Best Wishes |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19331
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| Re: re |
| Posted: Fri Mar 28, 2014 11:40 am |
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| rikotech8 wrote: | | Try to enable WDT in software. |
No, he is using the deep sleep watchdog, which is separate from the 'normal' watchdog, that the software enable affects. It is a big difference about these chips....
Best Wishes |
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alfaec
Joined: 26 Jul 2012
Posts: 5
Location: pistoia
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| re: Ttelmah |
| Posted: Sat Mar 29, 2014 1:46 am |
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Thank you Ttelmah
I'm going to test your code on my environment.
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Alessio Fabbri |
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