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How to generate 4 PWM's with specific delay between them?

 
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tonkostz



Joined: 07 May 2011
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Location: Bulgaria

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How to generate 4 PWM's with specific delay between them?
PostPosted: Tue Jun 12, 2012 7:36 am     Reply with quote

I want to generate 4 PWM's with specific delay between them?
On the picture below is an illustration of what I need. X is a fixed delay between the end of the first pulse of PWM1 and the start of the pulse of PWM2 and etc. All four pwm's will have same frequency and same duty cycle. Frequency will be between 1Hz and 15Hz.

I want to be able to change the fixed delay time X.
I plan to use PIC18F2431 or PIC18F4431 in order to use the Power pwm module.


I searched the forum but I did not find such topic or I did not manage to find it.
Ttelmah



Joined: 11 Mar 2010
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PostPosted: Tue Jun 12, 2012 8:37 am     Reply with quote

You probably have to do this with 'assisted software'. The hardware doesn't directly support it.
Though not quite the same, look at AN857. This develops three PWM's, with delays between, using a state machine, and the CCP to develop the phases.
Problem is that all the PWM's on anything below the DSPIC's, are operated off just one or two master oscillators, and the starting edges of each waveform, are therefore synchronised, with only two starting 'points' possible.
You could get 'close', with the PWM steering ability, manually switching the pulse steering to a different pin, for three or four cycles of the PWM, and then using a CCP as a separate timer to restart the cycle.
Using CCP timings, with a state machine, this is fairly easy at the sort of rates you are talking about (the application note manages just a few uSec between edges). Hardest thing will be timing other things, which can interfere with the pattern, if they take too long.

Best Wishes
tonkostz



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PostPosted: Tue Jun 12, 2012 9:55 am     Reply with quote

Thank you for the detailed explanation. I'll decide whether to move to dsPIC or to abandon this project.
Mike Walne



Joined: 19 Feb 2004
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PostPosted: Tue Jun 12, 2012 10:08 am     Reply with quote

What is the required duty ratio accuracy/resolution?

How much jitter can you tolerate?

Mike
temtronic



Joined: 01 Jul 2010
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PostPosted: Tue Jun 12, 2012 10:12 am     Reply with quote

Considering the frequency of the PWM signals, it'd be real easy to 'roll your own' PWM code instead of trying to get a PIC with PWM built-in that doesn't work 'off the shelf'.
Depending on what else the PIC has to do, you might want to just spend a $1 to have a PIC dedicated as a 4 chnl PWM subPIC.
Mike Walne



Joined: 19 Feb 2004
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PostPosted: Tue Jun 12, 2012 10:21 am     Reply with quote

Use virtually any bog standard PIC. Say 20MHz clock, interrupt @ 10kHz, drive all four PWMs from the one 100us tick.

Finger in the air guess-work suggests approaching 10bit performance @15Hz and better @ 1Hz.

Mike

EDIT

During one cycle you've got 8 times where pulse edges occur. I.e. there are 8 inter-edge intervals and 8 different output states.

Here's a suggestion:-

Use one of the hardware timers to create an interrupt at 100us intervals. I.e. create a 100us tick.
Create four variables, this_time_interval, next_time_interval, next_state, and ready_for_next_data_flag.

Interrupt ISR routine:-

(1) Decrement this_time_interval.
(2) If this_time_interval > zero exit ISR.
(3) If this_time_interval == zero then:-
(3a) This_time_interval is loaded with next_time_interval
(3b) Transfer next_state to output port.
(3c) Ready_for_next_data_flag is set.
(3d) Exit ISR

Main() routine:-

(1) Polls ready_for_next_data_flag.
(2) If flag is clear do other tasks then loop back to (1).
(3) Flag is set so:-
(3a) Calculate (or look up) new value for next_time_interval (in units of 100us)
(3b) Calculate (or look up) new value for next_state.
(3c) Clear ready_for_next_data_flag.
(3d) Do other tasks then loop back to (1).

Mike
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