CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to support@ccsinfo.com

Bug in SPI setup for dsPIC?

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
icefield



Joined: 09 May 2005
Posts: 20
Location: Canada

View user's profile Send private message

Bug in SPI setup for dsPIC?
PostPosted: Tue Sep 07, 2010 4:39 pm     Reply with quote

Is it my imagination, or is there a bug in the compiler (4.112)? The snippet below compiles as shown below...

Code:
#include <33FJ256GP506.h>

#use delay(clock=20000000)

void main()
{
   setup_spi(SPI_SLAVE | SPI_H_TO_L | SPI_SS_DISABLED);
   setup_spi(SPI_SLAVE | SPI_H_TO_L | SPI_SS_ENABLED);
   setup_spi(SPI_SLAVE | SPI_SS_ENABLED);
   setup_spi(SPI_SLAVE | SPI_SS_DISABLED);

}


Bit 7 of SPI1CON1 is the SSEN bit, but the compiler seems to be inverting the sense of the bit. The relevant defines in 33FJ256GP506.h are correct, but the compiler is not simply OR'ing the flags together and loading the value into SPI1CON1 (as I would expect).

Note also that bit 8 (CKE) is getting set when all I asked for was bit 6 (CKP) to be set. CKP=1 with CKE=0 is a valid SPI mode, but there does not seem to be a way to achieve this because the compiler is "thinking"

Code:
From 33FJ256GP506.h:
#define SPI_SS_ENABLED             0x0080
#define SPI_SS_DISABLED            0x0000
#define SPI_SCK_IDLE_HIGH          0x0040
#define SPI_H_TO_L         SPI_SCK_IDLE_HIGH


Resultant ASM:
.................... setup_spi(SPI_SLAVE | SPI_H_TO_L | SPI_SS_DISABLED);
00212: BCLR.B 240.6
00214: MOV #1C0,W4 <- bit 7 set (SSEN enabled, not disabled) - also bit 8 set???
00216: MOV W4,242
00218: BSET.B 241.7
.................... setup_spi(SPI_SLAVE | SPI_H_TO_L | SPI_SS_ENABLED);
0021A: BCLR.B 240.6
0021C: MOV #140,W4 <- bit 7 clear (SSEN disabled, not enabled) - also bit 8 set???
0021E: MOV W4,242
00220: BSET.B 241.7
.................... setup_spi(SPI_SLAVE | SPI_SS_ENABLED);
00222: BCLR.B 240.6
00224: CLR 242 <- bit 7 clear (SSEN disabled, not enabled)
00226: BSET.B 241.7
.................... setup_spi(SPI_SLAVE | SPI_SS_DISABLED);
00228: BCLR.B 241.7
icefield



Joined: 09 May 2005
Posts: 20
Location: Canada

View user's profile Send private message

PostPosted: Tue Sep 07, 2010 4:52 pm     Reply with quote

Oh, I forgot. The last line:

Code:
setup_spi(SPI_SLAVE | SPI_SS_DISABLED);


actually disables the SPI, which is NOT what I asked for. It is possible to use the SPI bus in slave mode without SS (synchronization can come from some other hardware source). But there is no #define for SPI_DISABLE. Again, the compiler is "thinking" - if the user asks for a 0x0000 setup word, they must want the SPI disabled. Hmmm.
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group