asmboy
Joined: 20 Nov 2007
Posts: 2128
Location: albany ny
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| interrupt shared access to EXTERNAL port latch - safe? |
 Posted: Sat Jun 05, 2010 10:41 am |
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Used on 18F4620 but the pic is not the issue.
I had to add a second data latch to a design I inherited for upgrade.
The design already used port D to DIRECTLY update a number of bits based on a timer0 interrupt every 16 ms. Port D was previously used directly now there are TWO 74HC573 latches sharing the port output - one for the previous INT based function - ONE that is updated only as needed.
I was anxious about using the HC574 ( edge triggered)
and decided to use the 74hc573 which is flow thru with latch-clock HI -
to prevent the now-shared, interrupt driven use of Port D from
trashing the updates of the new added hardware.
I thought of doing it this way.
( BTW PIN_A4 is used to clock the latch for the timer INT )
| Code: |
// some of the new added code
int1 dinuse=0; // flagged only when outputting on INT shared port
unsigned int8 myctl=0; // ctl bits updated as needed for a 74HC573 latch
.....
// MAIN() critical timing area as this updates
// the #INT timer0 SHARED latch port D
dinuse=1; // iloc -1 **
output_d(myctl); // iloc -2 ** ouput our stored control word
output_high(PIN_A5); // iloc -3 ** raise clk to open latch HC573
output_low(PIN_A5); // iloc -4 ** lower to hold value of myctl
dinuse=0; // iloc -5 ** done with update of latch
//
//
// ........
// my idea of prefix to #int handler for timer0
IF (dinuse) { // we KNOW what data D is supposed to have if here now!
output_Low(PIN_A5); // @ i-loc 3 must set clock low
// just in case we have reached crit step #3
// because this is a flow-thru latch & if clock =HI NOW,.
// MUST HOLD present portD value before changing port_D data bits
// this will complete a data latch op started by foreground
}
// --------------
// body of fast acting timer int code here
// do stuff change bits on int8 byt - send to D and
// latch using pin_A4
// --------------
//
//post actual int code
IF (dinuse) { // we KNOW what D is supposed to have
output_D(myctl); // restore the output byte no matter what
output_high(PIN_A5); // complete latch clock cycle
output_low(PIN_A5); //
// this will complete a data latch started by foreground
// no matter WHERE we interrupted OUT - NO harm to reassert
// myctl byte and fully clock it - again- even if it is repeated on exit
// OR IS THERE ?????
}
// INT handler ends
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