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[SOLVED] PIC24FJ256GA110 SPI in Framed Mode

 
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bkamen



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[SOLVED] PIC24FJ256GA110 SPI in Framed Mode
PostPosted: Wed Feb 03, 2010 8:04 pm     Reply with quote

Hey all,

Can anyone verify on their explorer16 (if you have one) or any PIC24FJ256GA110 that:

Using SPI1
In Slave Mode
Framed mode (frame pulse precedes bit 0 of data)
Using ISR to service incoming data


That with no frame pulses, you receive zeros?

That's what I'm seeing now and the darned Microchip rep is taking forever (a full week now) to troubleshoot this with me.

Thanks a bunch!

-Ben

PCWHD 4.105 w/MPLAB & ICD3
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Dazed and confused? I don't think so. Just "plain lost" will do. :D


Last edited by bkamen on Thu Feb 04, 2010 4:59 pm; edited 1 time in total
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PostPosted: Wed Feb 03, 2010 8:29 pm     Reply with quote

Ben,

Do you really heve version 4.105? I only see 4.104 available for download.
bkamen



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PostPosted: Wed Feb 03, 2010 8:46 pm     Reply with quote

well, I have PCD 4.105 (yes. really. I do.)

Hahaha.. the rest are 4.104.
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FvM



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PostPosted: Thu Feb 04, 2010 4:32 am     Reply with quote

Your question isn't exactly clear.

You are refering to SPI Slave/Frame Slave operation?

Do you observe SPI interrupts without Frame Sync pulses at the input? Behaviour of SPI interrupts in SPI
Slave/Frame Slave mode isn't discussed in the PIC24 familiy reference manual. From the description of
SPI Master/Frame Slave operation, I would expect interrupts only after completed transmission respectively
after an active sync pulse.

Did you set the sync pulse phase correctly?
bkamen



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PostPosted: Thu Feb 04, 2010 11:10 am     Reply with quote

Sorry FvM, let me elaborate (now that you've bit Smile )


SPI1 is set up for framed slave mode. So yes. SPI Slave/Frame Slave
I have enhanced buffering turned off for now (because of this problem)


I have an ISR handing received data.

At soon as I snap on a synthesized clock from another PIC pin (Timer generated for now until I get PWM working. It's a user test feature I need anyway) the SPI module starts receiving zero every 16 clocks. Frame pulse or not.

I'll check the frame pulse polarity again. Right now it's set to 1.

brb,

-Ben
_________________
Dazed and confused? I don't think so. Just "plain lost" will do. :D


Last edited by bkamen on Thu Feb 04, 2010 11:25 am; edited 1 time in total
bkamen



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PostPosted: Thu Feb 04, 2010 11:24 am     Reply with quote

Framed Slave mode is TRUE. (SPIFSD = 1)
Frame Pulse Polarity is TRUE. (SPIFPOL = 1)
Frame Edge is set for False (SPIFE = 0

(scratching head)
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Dazed and confused? I don't think so. Just "plain lost" will do. :D
bkamen



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PostPosted: Thu Feb 04, 2010 4:59 pm     Reply with quote

I fixed it. It was a bad connection on my PICtail slot. (nice)

If I tested from the PICtail expansion PCB's header, it worked fine.

once I tested at the CPU on the PIM, Fsync was HIGH. Thus the stream of received zero's.

Nice.

-Ben
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Dazed and confused? I don't think so. Just "plain lost" will do. :D
FvM



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PostPosted: Thu Feb 04, 2010 5:32 pm     Reply with quote

Yes. I expected something like this.

With pin select feature, you can by the way, connect an output function and one or more input functions to the
same physical pin. So you can operate two SPI units back-to-back without connecting external signals
to the processor.

I could verify that the framed modes are working correctly in both 8- and 16-bit operation.
bkamen



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PostPosted: Thu Feb 04, 2010 5:45 pm     Reply with quote

Yea, I've read that with somewhere else... it was using the DMA module in one of the PIC's (I think 8bit) move blocks of RAM around. Hahaha.

Anyway - I just wanted a sanity check after having all sorts of other errata issues.

(the bit rate on the UARTs -- as you saw) and then also the fact for the GA010 with SPI, there was another issue I ran into. Which is why I switched out for this GA110.

Thanks for the help.

-Ben
_________________
Dazed and confused? I don't think so. Just "plain lost" will do. :D
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