CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to support@ccsinfo.com
Using the PLL Prescaler in the 18F97J60

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
JohnHopkins
Guest
Using the PLL Prescaler in the 18F97J60
PostPosted: Sat Dec 12, 2009 12:54 pm     Reply with quote
PIC- 18F97J60
Compiler- 4.085

I am trying to use the PLL pre-scaler to scale the 25 MHz xtal to a 12.5 MHz system clock.

I followed the syntax defined in the CCS manual:

Quote:
//application is using a 10Mhz oscillator, but using the 4x PLL
//to upscale it to 40Mhz. Compiler will set H4 config bit.
#use delay(clock=40M, oscillator=10M)


Here is my test program:

Code:
#include <18F97J60.h>
#device PASS_STRINGS = IN_RAM

#fuses HS,NOWDT,PROTECT,NOFCMEN
#use delay(clock=12500000, oscillator=25M)

//Debug         
//#use rs232(BAUD=9600, XMIT=PIN_D3, BITS=8, PARITY=N)

/////////////////////////////////////////////////////////////////////////////////////////////////////////
//Functions//////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////////

void setup_io() {
   set_tris_a(0xFF);
   set_tris_b(0xFF);
   set_tris_c(0xFF);
   set_tris_d(0xFF);
   set_tris_e(0xFF);
   set_tris_f(0xFF);
   set_tris_g(0xFF);
   set_tris_h(0xFF);
   set_tris_j(0xFF);

   output_high(PIN_D7);      //ss eeprom
   output_high(PIN_J6);      //relay cs
}

void main(void) {
   disable_interrupts(GLOBAL);
   setup_io();

   while(1) {
      output_toggle(PIN_D3);
      delay_ms(1000);
   }
}


When I scoped the waveform on D3, I saw a 500 ms delay between toggles. Furthermore, when I print serial data, it comes out at 19200 (2x the baud rate I declare). So the compiler thinks that I am compiling a program for a PIC with a 12.5 MHz crystal, and is actually running 2x too fast. I read the OSCTUNE=0x00, so I know the PLL and post-scaler are both disabled. There is no HSPLL fuse for my version of the compiler, so I used the HS fuse.

My question is: How do I use the delay statement to tell the compiler that I want to use the divide-by-2 prescaler and/or postscaler to divide the xtal clk by 2 (or 4)?

Thanks for your help.
bkamen



Joined: 07 Jan 2004
Posts: 1611
Location: Central Illinois, USA

View user's profile Send private message

PostPosted: Sat Dec 12, 2009 8:01 pm     Reply with quote
I have:

Code:
#use delay(clock=41666700)
#fuses H4_SW



And eventually in main(),

Code:
setup_oscillator(OSC_PLL_5_DIV_3);


This sets me up for the 25x5 = 125MHz /4 = 41.66MHz / 4 = Fcy or 10.416MHz

Do you need 12.5 /4?

I don't think you can get that with the combination of /2 or /3 with a 25MHz XTAL.


See DS39762D.pdf - page 44 and you'll see what I mean.

I'm going to double check though.

-Ben
_________________
Dazed and confused? I don't think so. Just "plain lost" will do. :D
bkamen



Joined: 07 Jan 2004
Posts: 1611
Location: Central Illinois, USA

View user's profile Send private message

PostPosted: Sat Dec 12, 2009 8:24 pm     Reply with quote
No. You can't do that.

The aforementioned table in the PDF is on the money even though the text might be interpreted that one might be able to use the postscaler without the prescaler. You can't.

-Ben
_________________
Dazed and confused? I don't think so. Just "plain lost" will do. :D
JohnHopkins
Guest
That did the trick
PostPosted: Sun Dec 13, 2009 3:51 pm     Reply with quote
Thanks for responding.

I read the text and missed the table. Good call on that.

I don't need 12.5/4 MHz. I just want to reduce power consumption in the PIC, and I don't need to run at 25 MHz.

I followed your example and used the x5 PLL with the /3 prescaler and postscaler to reduce the system clock to 13.89 MHz.

This reduced the current draw by 4 mA.
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group