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ahmadkamalnasir
Joined: 24 Nov 2009
Posts: 5
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| Slave I2C |
 Posted: Tue Nov 24, 2009 1:51 pm |
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Hi,
I have a question about the I2C communication of PIC16F690 in slave mode.
My question is, How do we know about the acknowledge status after sending a byte to master? |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Fri Nov 27, 2009 8:44 pm |
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Download the 18C MSSP Reference Manual from Microchip:
http://ww1.microchip.com/downloads/en/DeviceDoc/39520.pdf
Look in this section:
| Quote: | 20.4.1.3 Slave Transmission
As a slave-transmitter, the ACK pulse from the master-receiver is
latched on the rising edge of the ninth SCL input pulse. If the SDA
line was high (not ACK), then the data transfer is complete. When
the not ACK is latched by the slave, the slave logic is reset and
the slave then monitors for another occurrence of the Start bit.
If the SDA line was low (ACK), the transmit data must be loaded into
the SSPBUF Register, which also loads the SSPSR Register and sets the
BF bit. Then the SCL pin should be enabled by setting the CKP bit.
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If the slave logic (the hardware) is reset, this will be seen in the value
returned by the CCS function i2c_isr_state(). Instead of getting
values from that function in the 0x81-0xFF range, you will get values
less than 0x80. See the i2c_isr_state() section of the CCS manual. |
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