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epalite
Joined: 06 Apr 2008 Posts: 16
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Why i2c_isr_state() testing SSPBUF.0 instead of SSPCON.RW |
Posted: Mon Jun 29, 2009 10:49 pm |
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Hi,
The disassembly of i2c_isr_state() reveals that it reads SSPBUF.0 to determine if the ADDR is for read or write, instead of probing SSPCON RW flag. Why is that so?
The Microchip AN734 shown the use of SSPCON RW to determine ADDR+R or ADDR+W.
Code: |
646: smbusState = i2c_isr_state();
004C 1683 BSF 0x3, 0x5
004D 1A94 BTFSC 0x14, 0x5 ; SSPSTAT.DA, ADDR or DATA
004E 2854 GOTO 0x54
004F 1283 BCF 0x3, 0x5
0050 01EC CLRF 0x6c ; 0x6c, CCS I2C internal use register
0051 1813 BTFSC 0x13, 0 ; SSPBUF bit 0, RD or WR
0052 17EC BSF 0x6c, 0x7
0053 1683 BSF 0x3, 0x5
0054 1283 BCF 0x3, 0x5
0055 086C MOVF 0x6c, W
0056 0AEC INCF 0x6c, F
0057 00CE MOVWF 0x4e ; smbusState 0x4e
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Info:
1. CCS PCM C Compiler, Version 4.073, 38894
2. Target IC, master 16F887 MSSP, slave 16F916 SSP |
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FvM
Joined: 27 Aug 2008 Posts: 2337 Location: Germany
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Posted: Mon Jun 29, 2009 11:10 pm |
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If you request i2c_isr_state() after receiving the address byte, both methods are equivalent. However, I didn't think yet about the intended use of this function. The compiler manual isn't very clear in this respect. Acquiring the necessary information from SFR directly is probably the clearer method. |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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epalite
Joined: 06 Apr 2008 Posts: 16
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Posted: Mon Jun 29, 2009 11:57 pm |
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Hi PCM Programmer,
I read your explanation.
My question is why doesn't the i2c_isr_state() function extract the R/W flag from SSPCON.RW (0x94 bit 2)?
Doesn't the SSPCON.RW carry the ADDR R/W flag?
Hi FvM,
The i2c_isr_state() is used in the INT_SSP ISR.
Thanks. |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Tue Jun 30, 2009 12:54 am |
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That is a good question. I'll look at it tomorrow, if nobody else does it first. |
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epalite
Joined: 06 Apr 2008 Posts: 16
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Posted: Tue Jun 30, 2009 1:32 am |
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Hi,
I rewrote and emulated i2c_isr_state(), except to retrieve RW from SSPCON.RW instead of SSPBUF.0. It didn't work on 16F690, 16F916, 16F887 M/SSP slave.
It seems RW flag has not been set on SSPCON.RW. |
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Ttelmah Guest
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Posted: Tue Jun 30, 2009 3:16 am |
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In the first ISR, SSPBUF, _must_ be read. If it is not, the BF flag won't clear, and WCOL/OERR can become set on the next byte. So, to use the R/W bit in SSPCON, you actually have to read the SSPBUF, anyway, so it is simpler just to use the bottom bit from SSPBUF, and 'kill two birds with one stone'. Where the R/W bit is useful, is on the second pass in the ISR, where it keeps the status recorded with the start of the transaction. However the I2C_ISR_STATE function, itself saves the bit, so it makes no point to use this bit. for the function as written.....
It is just a case of a chip feature, not really gaining anything, and not being used.
Best Wishes |
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