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Calculating a 48-bit tuning word...

 
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Frozen01



Joined: 23 Apr 2009
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Calculating a 48-bit tuning word...
PostPosted: Tue Jun 02, 2009 6:50 am     Reply with quote

Hi again all...

Now that I am able to communicate with my ad9852 DDS chip I now have to come up with a way to calculated the frequency tuning word. It is a 48-bit value which is calculated via this formula:

FTW = (Frequency * 2^48)/(Ref_clk * Multiplier)

From this I need to send the answer out the SPI interface in 8- bit chunks.

Any thoughts?
RLScott



Joined: 10 Jul 2007
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Re: Calculateing a 48-bit tuning word...
PostPosted: Tue Jun 02, 2009 9:01 am     Reply with quote

If you want the full precision of the 48-bit Frequency Tuning Word in the AD9852, then standard 32-bit floating-point or the 32-bit long data types in the compiler may not be precise enough for you. But if your application uses only a small portion of the range of this variable, or is satisfied with 24-bit or 32-bit precsion, then maybe you can use these native data types. You need to specify more about your application, including what PIC you will be using, what reference frequency you will be feeing the AD9852,and what range of FTWs you will be using. That will determine the best way to calculate them with C statements. In general, I think you want to re-write the forumula so that the 2^48 term gets combined with the Ref_ck term and/or the multiplier. Perhaps the ultimate formula will be something like:

Code:

uint32 FTW;
float Frequency;
float Xfactor;
FTW = (uint32)(Frequency * Xfactor);

where Xfactor emcompasses Ref_clk, Multiplier, and 2^48 all in one number. This might cover frequencies in the lower range. If you want higher frequencies, then you might have to left-justify this 32-bit result in a 48-bit field and generate some low-order zero bytes to send over the SPI to the AD9852.
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Robert Scott
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Frozen01



Joined: 23 Apr 2009
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PostPosted: Tue Jun 02, 2009 11:55 am     Reply with quote

I am using a PIC18F45J10. My Reference Clock is 20MHz. I want to be able to tune from 100KHZ to 2MHZ in setps of 100Hz if possible.
Steve H.
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PostPosted: Tue Jun 02, 2009 8:00 pm     Reply with quote

The very best thing to do is to pick some power of 2 for the clock - then the LSB can be an even Hz value. That will make a fixed point solution very easy to figure out. For instance I make many of my designs to use a 12 bit DAC or ADC running on a 4.096 V reference. that way the LSB is 1 mV. Very easy to do fixed point on this.

Even when I program a DDS with a PC I use fixed point to get the accuracy required.

I also do RF PLL's and floating point, besides being a very big memory waster simply won't have the accuracy that you will probably want and need.

I always very carefully look at the bit patterns and figure out some way to use fixed point to represent the tuning word - this prevents all sorts of round off errors that happen when using floating point.

For instance - I have designed PLL's that can tune from 850.0000 to 890.0000 MHz and it has a 12.5 KHz step size - by carefully looking that the bit patterns I can figure out how to program the thing using fixed point. This may take a few hours of work - but the result is small code and no round off error.

I would encourage you to look at using fixed point. It's a skill worth knowing.

You can see some code that I wrote a long time ago for a 144 - 148 MHz receiver here...

geocities (dot) com/hagtronics/2_meter.c

HTH - Steve Hageman
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