EEPROM Erased when clearing an EEPROM cell bit?

[ckrusen]

The data sheet for the 16F688 states,"A byte write automatically erases the location and writes the new data (erase before write)."

When most EEPROMs are erased, the memory is set to 0xFF. Writing to the EEPROM clears the required bits. If you wanted to change an EEPROM byte from 0x7F to 0x77, you wouldn't need to "erase" the byte, just clear bit 3 of the eeprom cell.

Is a complete erase done even when the write only requires clearing set bits in the eeprom?
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Calvin

[treitmey]

for the data sheet I'm looking at.. 18F4620
It shows a similar statement to your quote.
and a little above that it shows.

[FvM]

[ckrusen]

[FvM]

From a user perspective, your question won't get you anywhere, cause the erase action is hardwired to the write command. There is nothing you can influence.

I understand, that you want to know, what the device is actually doing, when you e.g. update a cell from 0x7f to 0x3f. As previously mentioned, it's difficult to know exactly (unless reverse engineering the chip). I expect a solution, that involves a minimum gate count, not optimizing anything without a serious need.

In other words, most likely the erase is always performed without considering the actual data. Besides achieving a lean design, there are probably additional technical reasons to do so, in a short assuring reliable operation in any case.

When looking at memory with separate accessable erase and program action, the question gets interesting - and also complicated. You'll find e.g. specifications, that allow not more than two consecutive program cycles of a byte cell after an erase, because not programming a bit apparently affects the memory somehow.

[Ttelmah]

If you look at latter chips like the PIC24's, these have a 'PGMONLY' bit that can be set, to perform a write without automatic erase. On the PIC16 chips, there is no choice. Interestingly though, the 'life' consequences are the same. The 'erase/write' cycle, is treated for endurance terms, as only one cycle of the memory, even if the value in an individual bit changes twice during this.

Best Wishes

[FvM]

I think, it's difficult to conclude detailed properties from a few meagre datasheet lines. Actually, there are only four small PIC24FxxKA devices up to now, that are equipped with data EEPROM and the said feature. With all other PIC24 chips, EEPROM must be emulated in program flash.