CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to support@ccsinfo.com

SS pin and setup_spi()

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
LGU



Joined: 06 Apr 2009
Posts: 2

View user's profile Send private message

SS pin and setup_spi()
PostPosted: Mon Apr 06, 2009 11:14 am     Reply with quote

Hi

I can't get the SS1 pin to work together with the spi_write() function.

After running the program past the setup_spi() the SPI1CON1 reg show 0x003f. This means that the SSEN bit is clear and SS pin function is disabled. SPI1CON1 should be read 0x00BF after setup_spi().

Since there are a #define SPI_SS_DISABLED in the header file I then assume that SS pin function ought to be set by default. Data out and SCK works ok.

Regards
Lars
Code:
#include "33FJ128GP708.h"

void main(void){
   Clock_Stepup();
   delay_ms(50);
        setup_spi(SPI_MASTER  | SPI_L_TO_H | SPI_CLK_DIV_1 );
        .......
}
ckielstra



Joined: 18 Mar 2004
Posts: 3680
Location: The Netherlands

View user's profile Send private message

PostPosted: Mon Apr 06, 2009 12:31 pm     Reply with quote

Slave Select is a hardware input pin and only used on the Slave. On the Master you are free to choose any pin as a select output pin and drive it from your program, it will not be driven by the spi_write function.
LGU



Joined: 06 Apr 2009
Posts: 2

View user's profile Send private message

PostPosted: Tue Apr 07, 2009 12:55 am     Reply with quote

So it is !
I was reading the datasheet too quick. The description for the SS pin is like this " I/O pin , SPI1 slave synchronization or frame pulse I/O." The description is a bit vague, I assumed that slave sync was enabled even in master mode to sync external slaves.

SS pin is an output in SPI framed master mode but then the SCK is free running so it not much to use in my application. My application interface to an ENC28J60 that expect that SCK is low in idle.

SPI is a 4 pin interface so maybe SS pin should be active even in master mode!

Now I don't want to wait for the transmit to end so I need to use an interrupt to raise the pin.

Many thanks
Lars
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group