I am trying to set up a PIC as a slave and be able to do indexed reads for 256 addresses at one time. I seem to have run into a limit of this function....
For example, the first read I do, the state is 0x80. The next read is 0x81. That would correspond to addresses 0x00 and 0x01. This works okay for reads up to 0x7F. However, it breaks after that.
Does anyone have some suggestions or possible work-arounds?
Thanks!
From the "returns" of i2c_isr_state():
Code:
state is an 8 bit int
0 - Address match received with R/W bit clear
1-0x7F - Master has written data; i2c_read() will immediately return the data
0x80 - Address match received with R/W bit set; respond with i2c_write()
0x81-0xFF - Transmission completed and acknowledged; respond with i2c_write()
PCM programmer
Joined: 06 Sep 2003 Posts: 21708
Posted: Mon Mar 23, 2009 11:46 am
If you want to make your own, expanded, version of i2c_isr_state(),
this information will help:
Thanks for the links, it really helped. I was able to get this working well.
I added a global variable (called i2cs_rw in the code below) to signify a read or write and saved the whole state (to i2c_state) instead of using one of those bits to signify a read or write.
Code:
#inline //instantiates a copy every place it
long my_i2c_isr_state(void) // is called
{
static long i2c_state = 0x03; //state variable
long retval; //variable to return
if(!DA_BIT) { //if slave address byte was received
i2c_state = 0; // then clear state.
i2cs_rw = 0; //default to write operation
if(RW_BIT) i2cs_rw = 1; // if it is a read oepration, set flag
}
retval = i2c_state; //return the current state
i2c_state++; //auto-increment
return(retval); // but return current, not auto-inc
}
You would also have to change the standard interrupt service routine code as well to look for this read/write instead of state > 0x80.
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