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18F4620 document omissions on EUSART FIFO

 
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asmboy



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18F4620 document omissions on EUSART FIFO
PostPosted: Mon Mar 02, 2009 11:27 am     Reply with quote
in the 16F887 the EUSART serial receive FIFO is spec'd at being two chars deep.

the 18f4620 has a receive FIFO too - but darned if they print a SPEC in the datasheet for its depth. and i don't have a quick experiment up my sleeve to ascertain it.

does anybody know for CERTAIN how deep the 18F4620 receive fifo really is?

or should i enter the Microchip.com support que and make humble petition and live offerings for an accurate answer?
PCM programmer



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PostPosted: Mon Mar 02, 2009 11:41 am     Reply with quote
The block diagram shows it has a 2-deep receive fifo:
Quote:
FIGURE 18-6: EUSART RECEIVE BLOCK DIAGRAM

18F4620 data sheet:
http://ww1.microchip.com/downloads/en/DeviceDoc/39626e.pdf

The receive timing diagram shows Word 1 and Word 2.
Quote:
FIGURE 18-7: ASYNCHRONOUS RECEPTION


The note at the bottom of that diagram is consistent with a 2-deep fifo:
Quote:

Note: This timing diagram shows three words appearing on the RX input.
The RCREG (receive buffer) is read after the third word the OERR
(overrun) bit to be set.
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