Fail to ID chip - No xtal oscillation

[w2drz]

Hi,

CCS 4.071
U40 programmer
PICC 18F4682

Have a new designed 4 layer board, 10 MHz xtal, 28 pf xtal caps,
Ground is bottom layer, use 2 via in osc trace to connect 2 xtal leads on bottom.
2 test boards same results,
before programming no xtal oscillation, so proceeded to ICD test,
ICD will not ID chip.
+ 5 volts is correct to normal pins and bypass of .1 on PICC power & GND pins.
Checked programmer for all recommended test's when attached to board,
programmer passed test as recommeded when attached to board.
Programmer works on other older development boards.
xtal routing is not what I would have done. Board layout looks to be problem possibly do to capacity of the layers to xtal traces.
STUFFED Board's are 400+ miles away so it will be several days before have one in hand to test here. Remote testing is best I can do for now.

any suggestions for what to look for as cause of failuer

tom
As usual project is 2 weeks ago delivery.

[Ttelmah]

Start by looking at the MicroChip application notes. You will find that there is one for the oscillator, which suggests that if using power planes, these should _not_ run right round the oscillator pins (this is common for oscillator design, on _most_ chips, not just PICs). Texas also have some good notes about this. It sounds as if you are routing the oscillator tracks on the ground plane, with several mm of track, running close to this plane, giving a significant capacitance. There is then also the capacitance of the pads to the power plane entering the equation as well, since at these frequencies, this is considered to be directly coupled to the ground. So instead of the typical 5 to 6pF, normally allowed for the pin capacitance to ground in calculating the correct capacitors to select, you have far more capacitance here. Some 'guesses' assuming 0.2mm PCB track spacing to the ground plane, and 0.3mm track width, with tracks 1.5cm long to the crystal and capacitors, and normal sized pads. Assuming you are using FR4 laminate with a permittivity of about 4.4, suggests that you may have more than the recommended loading capacitance already present (assuming these are crystals designed for perhaps 22pF), even without putting capacitors into the board...
A lot depends on the track area, and PCB gaps used, so this is very much a 'guess' without any real data, but it suggests where the problem is.
I'm assuming these are crystals designed for 22pF loading, since the formula for the crystals is:

Cload = (cap/2) + Cboard +Cpin

The normally used figure for Cboard + Cpin, is typically about 8pF, which then gives a 28pF cap, giving a 'design' Cload of about 22pF.
Nw, I'm getting on my 'guess', Cboard + Cpin, being more like 40pF, which with the 28pF capacitors,then gives Cload as 54pF....

You may well be able to get this to work, by finding crystals designed for a higher load capacitance. Some are normally available for 56pF loading, and if my guess is even close, this should b getting into the right 'order'...

Best Wishes