Question about fast interrupts and context saving

[mak]

Hello,

I'm working with a PIC18F4620, and my application has a comparator interrupt with the "fast" directive to minimize the number of instructions leading up to the ISR (#int_comp fast). I'm confused about what I need to save context when "fast" is used.

From the CCS manual:
"An interrupt marked FAST is performed without saving or restoring any registers. You should do as little as possible and save any registers that need to be saved on your own. "

However, from section 10.9 of the datasheet ("Context Saving During Interrupts"):
"During interrupts, the return PC address is saved on the stack. Additionally, the WREG, STATUS and BSR registers are saved on the Fast Return Stack. If a fast return from interrupt is not used, the user may need to save the WREG, STATUS and BSR registers on entry to the Interrupt Service Routine."

Can someone clarify this for me? Does "#int_comp fast" mean that the fast return stack is used at the end of the ISR? What other registers do I have to be concerned about?

Thank you.

[Ken Johnson]

What you need to save depends on what you do in your isr. Just set a bit, probably nothing.

But, look at the asm code generated by the compiler for your isr - you'll see what regs are used.

Ken

[mak]

Ken - thanks for your reply. What about WREG, STATUS and BSR? Are those saved and restored automatically? Do I only have to save registers that I might overwrite in my ISR?

For the sake of argument, suppose I have an ISR that does nothing. In that case, would I have to save/restore anything, or would the processor take care of all the required registers?

Thanks,
Mark

[Ttelmah]

On the '18' chips, the RETFIE 1 instruction (which will automatically be used for the 'fast' handler), automatically restores the W, Status, and the BSR. Saves a lot of work!. :-)
If a high priority handler is not present, this is used for the normal interrupts, so having a high priority interrupt, automatically 'slows' the normal interrupt handlers by a few instructions. Also, beware of the caveat, that if INT0 is used, this allways becomes a high priority interrupt, if the high interrupts are enabled there is no INT0P bit...). Hence if this is in use, and you want to ue any other high priority interrupt, you _must_ add handler coe to check which interrupt has triggered......

Best Wishes