View previous topic :: View next topic |
Author |
Message |
Gerhard
Joined: 30 Aug 2007 Posts: 144 Location: South Africa
|
Reading 1 analog pot value to 2 pics |
Posted: Tue Nov 13, 2007 5:28 am |
|
|
Is it posble to read one pot analog value to 2 different pics using different vref's or does the adc port of one pic interfere with the analog value of a different pic if the are connected on the same pin of the pot.
Also if the vref = 3volt and pic uses 5volt how do i setup the vref.
Code: | #define VSS_VREF 0x1000 //| Range 0-Vref |
I see this in the header file but how do i implement this in the hardware?? |
|
|
Gerhard
Joined: 30 Aug 2007 Posts: 144 Location: South Africa
|
|
Posted: Tue Nov 13, 2007 6:29 am |
|
|
I tried doing it as follows but it doesn't want to compile.
Code: | setup_adc_ports(sAN4|sAN5|sAN6);
setup_adc( ADC_CLOCK_DIV_8 );
setup_adc( VSS_VREF); 0x1000 //| Range 0-Vref
setup_vref(VREF_HIGH|11); //sets 3.0(vdd *value/32 +vdd/4) if vdd is 5.0V |
|
|
|
SherpaDoug
Joined: 07 Sep 2003 Posts: 1640 Location: Cape Cod Mass USA
|
|
Posted: Tue Nov 13, 2007 7:20 am |
|
|
Electrically it should work fine. Each A/D will contribute some noise to the other, but if the source impedance is OK the noise should be less than one lsb. _________________ The search for better is endless. Instead simply find very good and get the job done. |
|
|
Gerhard
Joined: 30 Aug 2007 Posts: 144 Location: South Africa
|
|
Posted: Tue Nov 13, 2007 7:31 am |
|
|
Thanks.
How do i setup the vref?? I tried it as shown on top but it doesn't work. The one pic works on 5volt and the other on 3volt |
|
|
Ttelmah Guest
|
|
Posted: Tue Nov 13, 2007 7:46 am |
|
|
It'll depend totally on the impedance of the source. Both inputs, will impose a leakage current load on the signal, all the time, and at the moment when the multiplexor on one chip connects, there will then be an extra load, of a few kilo-ohms, in series with a capacitor. If this will change the sgnal on the source, by more than half a bit, then it'll affect the other chip.
The leakage, equivalent series resistor value, and size of the internal capacitor, are all in the data sheets for the PICs.
If you have something like a 500R pot, then it'd be fine, but something like a 50KR pot, will already be presenting a higher impedance than the ADC wants, for even one chip. You can lower the effective AC impedance, and improve stability (at a cost in response speed), by adding an external capacitor on the signal. If this is significantly larger than the internal capacitors, you should be able to make this work. It is a standard electrical calculation, for the change in voltage on a capacitor, when a second capacitor, with a series resistance is attached. The 'worst case', will be when the input is right at one end of the ADC voltage range, and the internal capacitor is right at the other end of the range.
You use the VSS_VREF defintion, and apply the Vref to the Vref+ input pin on the PIC (look at the chips data sheet).
Remember _both_ Vref signals, must be above the maximum voltage you will ever see on the input pin, or the internal diode will start to come into play.
Ithink you are confusing the internal Vref (for the comparators), with the ADC Vref, which _you_ have to provide.
Best Wishes |
|
|
Gerhard
Joined: 30 Aug 2007 Posts: 144 Location: South Africa
|
|
Posted: Thu Nov 15, 2007 7:50 am |
|
|
Thanks for the advice.
I have done all the things you suggested but the noise is to much for both pics. As soon as you display the one value on LCD and turn the pot. The other pic messes that reading up terribly. I must say using RS232 between the pics is a much better way to do it and then I just send the value via RS.
Thanks. |
|
|
|