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Maximum pull up resistance on I/O

 
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JULIEN LAFFITTE



Joined: 28 Mar 2007
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Maximum pull up resistance on I/O
PostPosted: Tue Jul 03, 2007 7:05 am     Reply with quote

hello
i want the minimum current consumption on my board. what is the maximum pull up resistance on my I/O? Question
(my board is powered in 3V whith a pic18lf2523)
thank you for advance Surprised
SherpaDoug



Joined: 07 Sep 2003
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Location: Cape Cod Mass USA

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PostPosted: Tue Jul 03, 2007 7:25 am     Reply with quote

There are two factors that determine maximum pull-up resistance.

1) DC - What loads are on the line that the pull-up must drive? If there are logic gates then what is their input resistance? Also what voltage do they need to be pulled to in order to register as a logic "1". Draw it as a voltage divider with the pull-up pulling up, the loads pulling down, and the center at an acceptable logic "1" voltage level.

2) AC - How fast does the pull-up need to get the line to a logic "1"? The pull-up and the capacitance of the line and its loads makes a classic RC circuit. If you are sending a serial stream you want the time constant of the RC circuit to be 1/3 or less of the length of a bit, 1/10 would be better.

As a first guess you can use 100k at baud rates up to 9600 with light loading. At SPI or I2C speeds you will likely need to drop to 10K or so. If it is just a static application driving a FET gate as a load I have used up to 10Meg in commercial products.
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JULIEN LAFFITTE



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PostPosted: Tue Jul 03, 2007 7:44 am     Reply with quote

it's just a jumper for a logic state 1 or 0:
-without jumper, input to Vdd with pull up.
-with jumper, input to the ground.
with the jumper my 10k pull up make me consume 300uA and it's a lot for my embended application.
what is the maximum value can i give to my pull up for a few uA consumption?
thanks
sorry for my bab english Embarassed
Ttelmah
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PostPosted: Tue Jul 03, 2007 8:30 am     Reply with quote

You can go much lower on the current.
The internal software configurable pull-ups, only draw 50uA, and are more than adequate. The input leakage current on the pins is under 1uA.
Provided the pin is protected from ESD (remember that a high impedance pin running to a jumper, when the jumper is not present, is a very easy point for ESD to enter the circuit), you can go up to resistors like 470KR OK.

Best Wishes
JULIEN LAFFITTE



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PostPosted: Tue Jul 03, 2007 8:54 am     Reply with quote

whit the jumper, 470K pull up give me a comsumption of aprroximately 6uA(3/470K=6uA). It's really better than 300u. Cool
can i use more than 470K ? Laughing
tanks a lot
Ttelmah
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PostPosted: Tue Jul 03, 2007 9:13 am     Reply with quote

Realistically, not much further, safely.
The input leakage current is specified at 1uA max. You need to ensure that the pin is pulled to the required logic threshold by the pull-up, even if the entire leakage current is pulling the 'other way'. For a unit working on 3v, the 'high' level, for a pin with a TTL input buffer, is 2v, so the pull up, must not drop more than 1v, at 1uA. Hence 1MR absolutely 'max'. For a pin with a Schmitt input buffer the high level is 0.8*3v = 2.4v, and the resistor can then only drop 0.6v at 1uA >> 600KR.
So the largest resistor that is warranted to give a pull up, in the worst case, on the Schmitt inputs, is 600KR, and if you allow for a little supply droop, and the fact that resistor tolerances can go either way, with a little margin, 470KR, is a safe 'upper limit' for the worst case on the chips...

Best Wishes
JULIEN LAFFITTE



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PostPosted: Tue Jul 03, 2007 9:25 am     Reply with quote

tanks for your fast reply and your precisions
best regards Wink
libor



Joined: 14 Dec 2004
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PostPosted: Wed Jul 04, 2007 9:01 am     Reply with quote

I suppose this jumper acts as some setup configuration in your battery powered application. So you don't need to read its value very often (maybe just once after each start-up, or periodically but not to often either)
If you have a spare I/O pin you can make a controlled pull-up. Just connect the pull-up resistor to this pin instead of the power supply rail. And you drive this pin high only just before reading the jumper's value, and then you drive it low, so you can save that 6uA 99.999% of the time.
JULIEN LAFFITTE



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PostPosted: Wed Jul 04, 2007 9:10 am     Reply with quote

we reflect in this other way Wink
libor



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PostPosted: Wed Jul 04, 2007 9:22 am     Reply with quote

You can also make it with just one pin. Connect a pin thru a series resistor and a capacitor to the ground. The jumper should short the capacitor.
When you want to check the jumper's state, you drive the pin HI and then switch to input and read its level. If the capacitor is not shorted it will be still driving the input high. If it is shorted it will fall LOW immediatelly. (Proper timing of the charge-up must be observed.)
This arrangement will not consume any power when you are not reading it (most of the time) if you set the pin either low or to input, and it uses just one pin / jumper.
SherpaDoug



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PostPosted: Thu Jul 05, 2007 7:24 am     Reply with quote

Hardware, Software, Power... The eternal triangle of optimization!
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