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mrpicing
Joined: 22 Oct 2005
Posts: 20
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| problems with pic18f452 portb change interrupt |
 Posted: Sat Apr 21, 2007 1:58 am |
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Hi there.
i have problems with pic18f452 portb change interrupt.
1. when i enable interrupt of rb change a false int is generated
i tried to enable it, before and after other interrupts but result is nill.
i also tried to clear flag before enabling.
it ever is generated when execution starts or int is enabled.
2. on last change no value is copied.i have 4 signals going low on rb-rb7.
any signal may come at any time. any signal may be missed. but value copied is second last only.
i have also posted this problem at microchip forum.
| Code: |
//++++++++++++++++++++++++++++++++++++++++++++++
unsigned long time[6];
unsigned long count=0
unsigned int index=2; //location 0 and 1 one are reserved for other use
main()
{
//init_ports
//enable timer3 int, rb change int, and global int
while(1)
{
>>wait for compeletion of 4 portb change interrupts
or wait for coutn over flow to 50000;
>>disable all interrupts
>>send values of time to hyper terminal.
}//while(1)
}//main()
//++++++++++++++++++++++++++++++++++++++++++++++
/*isr code*/
//----------------------------
/*timer3 isr*/
count++;
/*timer3 isr*/
//----------------------------
/*portb change isr*/
//when first comes here the index is 2
time[index]=count;
port[index]=portb;
index++;
//portb change isr
//----------------------------
//++++++++++++++++++++++++++++++++++++++++++++++ |
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Ttelmah
Guest
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| Posted: Sat Apr 21, 2007 2:23 am |
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It would help, if you posted the actual setup, and code involved...
The sequence to setup a portb change interrupt is:
Read portB
clear the interrupt flag
enable the interrupt
The key bit you are probably missing, is the first line. The interrupt flag, is set, whenever the _latched_ value from portB (set whenever the port is read), differs from what is currently on the top four pins. If you clear the interrupt flag, but don't reset the latch, the flag will immediately be set again. If you look at the data sheet for the chip, and the bit concerning RBIF, there is normally a 'note' at the end of the defintion, which says something like:
"A mismatch condition will continue to set this bit. Reading PORTB will end the mismatch condition and allow the bit to be cleared."
So, there is no poin at all, in 'clearing' the bit, until a read is performed, otherwise the bit will reset immediately.
This is also why it is vital the the RB interrupt handler, must read the port (or the same problem will happen).
Best Wishes |
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