SPI slave being corrupted by timer interrupts

[rmash]

Embedded folks,
I'm having quite a bit of difficulty transferring data from one master PIC to two slave PICs.

The slave pics (18f458s 40mhz) generate PWM streams with timers 0,1,and 3 that drive motors. The point of having the pwm generation done with slaves is to guarantee that the pwm generation is clean and free from interfering interrupt artifacts. Incidently, these ISRs take from 3 - 5 uS to execute.

This is effectively an extension of the thread "I2C slave interrupt problem
"

I first put together an I2C arrangement that worked with the exception of sporadic glitches in the received data. I examined the data and clock lines, which seemed to be pretty clean. I decided that the I2C slave interrupt was being interfered with by the timer interrupts, so I changed my configuration to the SPI bus with the thinking that I could avoid having a communication interrupt in the slaves.

This SPI arrangement works just fine when the timer interrupts are turned off, but when they're turned on, the received spi data becomes intermittently corrupted. I am using the #use spi() directive and spi_xfer() command.
Also, I turned on the diagnostic feature in the #use spi directive and can see that the sampling pulse is sporadic when the timer interrupts are enabled, but then are perfectly stable when the timer interrupts are disabled.
Does the MSSP necessarily use the SSP interrupt when in slave mode?
I have some fallback strategies, but I'd really like to understand why this approach is failing. It seems there's something i'm not realizing here.
thanks in advance.
rmash

[PCM programmer]

Why start a whole new thread on what is basically a continuation of
previous topic ?