PIC16f877A PWM not fully on

[RA]

You won't be able to see this well unless you have at least a 100Mhz
O-scope and 100 Mhz probes. I'm using a tek 2246.


I notice when the PR2 reg is set to 255 and 1023 in entered into the
ccpr1L/cc1con register the pwm output will go low(0v) for 50ns(20Mhz) every 51us(19.57)Khz and stay high(5v) for the rest of the duration.

Yes, I do have 2x 10nf and 2x 100nf cap right on the Vdd and Vss pins.
The supply voltage is very clean.


Here's a simple test prog.




PCWH v3.249

Pic16f877A is REV B6

It's no big deal.
Microchip's PIC's never do exactly what they're advertised to do.
I've been bitten by their erratas in the past.

[Ttelmah]

This is fairly normal.
If you were designing such a circuit, there is a problem with handling the 'ends' of the range. You have to make a decision, whether the reset, occurs before, or after the set in the clock cycle. The Microchip solution, is to have this configured, so a 0, does give nothing out, but this implies that at the other end of the range, a full-on, will result in one clock of low output. They have a hardware 'trap', so that if the output _exceeds_ the full-on value, the line gets permanantly turned on, but a value that _matches_ the full on count, on some chips gives a single low output cycle as you are seeing.
The same is true on quite a few other PWM chips (not just PICs). You can program round it, if a lesser PWM maximum count is acceptable, by setting timer2, to 254, and then if the required value on the pulse width is >=1020, setting the value to 1023, which then triggers the extra hardware.

Best Wishes

[RA]

Yep, I thought so.
I suppose that's close enough by microchip standards.
On 18f parts it's much better
Darn those silicon propagation delays.