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Larry A Guest
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CCS SPI commands -HELP !! |
Posted: Fri Nov 03, 2006 11:31 am |
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I have CCS compiler version 3.242 programming a PIC 16F690. I've had multiple problems using the built in SPI commands. When viewed on a scope, the CLK signals seem to be shifted in time from where they should be, giving bytes with obviously dropped bits and wrong answers. I've been able to read and write to a microchip 25LC640 EEPROM, after many hours of frustrating experimentation, by using the SPI_H_L command to write to the EEPROM then switching it in code to SPI_L_H for the SPI_read command. It's working for know but I'm not that happy with it. Now I'm trying to read/write with a AT45DB321 with no luck. I know that I can write bit-bang routines but would prefer using the built in SPI commands since time is an issue. Is there anyone out there that has any suggestions?? Thanks |
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Mark
Joined: 07 Sep 2003 Posts: 2838 Location: Atlanta, GA
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Posted: Fri Nov 03, 2006 12:20 pm |
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Read the datasheet on the Pic and set the registers up manually. You can still use the hardware SPI. You don't have to use the CCS setup routines. |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Fri Nov 03, 2006 12:43 pm |
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Here's a 25LC640 driver, right here. I found it with the search function.
http://www.ccsinfo.com/forum/viewtopic.php?t=28199&start=1
Of course, I posted it, so I knew it was there.
But even so, the Search function would find it easily for you.
With regard to your question about the AT45DB321, first download
the data sheet:
http://www.atmel.com/dyn/resources/prod_documents/DOC1121.PDF
See if there is a section which explicitly tells you which SPI mode to use.
If they don't have that, look for timing diagrams of the SPI waveforms.
You need to look for these things: What edge of SCLK is used to sample
the incoming data ? What is the idle state of SCLK (high or low) ?
You can find the answer on page 9 of the AT45DB321 data sheet,
in the upper right. It says the chip can use SPI modes 0 or 3.
If you need to figure out the mode by looking at the waveforms,
you should consult the following website. It has diagrams which you
can compare to the data sheet to figure out the SPI mode.
http://www.totalphase.com/support/articles/article03/#modes
Now you know the mode. (Mode 0 for the AT45DB321).
What's an easy way to set it ? Look near the top of the sample
25LC640 driver that I gave the link to above. It has four constants
that define the four SPI modes. These were originally created by
CharlieU. Just plug the appropriate constant into the middle portion
of the parameters that you use in the setup_spi() function. Use the
mode constant instead of the CCS parameters of "SPI_L_TO_H" etc.
You still have to put in "SPI_MASTER" and the clock divisor constant.
Also, you have to choose the appropriate clock divisor, based on your
PIC's crystal frequency and the maximum SCLK speed, as given in
the AT45DB321 data sheet.
Now you have the SPI mode setup correctly, and you are ready to write
the rest of the driver. |
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Larry Anderson
Joined: 03 Nov 2006 Posts: 1
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SPI Help |
Posted: Sat Nov 11, 2006 8:48 pm |
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Thanks "PCM Programmer", I used the code to successfully write to the 25LC640 using the SPI_MODE_0_0 command. I've tried converting the driver to communicate with the AT45DB321 with no success. When using the SPI_MODE_1_0 I have some success, especially with the block erase command, but bits are still garbled. You reference the SPI mode on page 10 of the data sheet. I've tried both modes, but then on the previous page of the data sheet it states "The SPI mode will be automatically selected on every falling edge of CS by sampling the inactive clock state". I'm really confused at this point, any suggestions. |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Guest
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Posted: Wed Nov 22, 2006 6:44 pm |
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Thanks "PCM Programmer", I'll try part of the code when I have some time, it's pretty long. I was able to read/write with the AT45DB321B and a PIC 16F690 ( running a 20 MHz clock ) by using SPI_MODE_1_1 | SPI_CLK_DIV_64. Any other combination of mode or clk_div would not work. This seems a bit slow to me for these devices, and I would think it would work in mode 0 as well but it doesn't. Any ideas. |
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Guest
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Posted: Thu Nov 23, 2006 1:53 am |
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May i ask wats the diffence between the spi_modes_0_0 01 10 11 and how are they different from the normal L_to_H or H_to_L ? |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Fri Nov 24, 2006 1:26 am |
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Quote: |
May I ask whats the difference between the spi_modes_0_0 01 10 11
and how are they different from the normal L_to_H or H_to_L ?
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The SPI_L_TO_H and SPI_H_TO_L constants control the CKP bit in
the SSPCON register. The CKP bit controls the idle state of the SPI
clock. It determines whether the clock idles at a low or a high level.
The SPI_MODE_0_0 (etc.) constants incorporate the settings
described above, but they also include the CKE bit. The CKP bit
and the CKE bit together control the setup for the four SPI modes.
Here is a diagram of the clock of the SPI modes:
http://www.totalphase.com/support/articles/article03/#modes
Note that they refer to CPOL (clock polarity) and CPHA (clock phase).
Here's a post that explains how this translates to the Microchip CKP
and CKE bits:
http://www.ccsinfo.com/forum/viewtopic.php?t=27890&start=5&highlight=cke+ckp |
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