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Comparator Interrupt Woes

 
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jecottrell



Joined: 16 Jan 2005
Posts: 559
Location: Tucson, AZ

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Comparator Interrupt Woes
PostPosted: Sat Mar 17, 2007 2:54 pm     Reply with quote
18F6627
3.236


Hello All,

I'm going to start kind of vague because I can't narrow down anything with any precision.

I am using AN1 and Comparator1 on the 6627. I layed out the suspect board with a previous (working) solution in mind. Unfortunately, I didn't know the modules where brought out on different pins from the previous part (4620). I think I've recovered using some spare pins, but when I start using the ADC I start getting odd COMP_INT's during sleep, actually right after sleeping. If I comment out the ADC code the COMP_INT works as expected. Also, if I watch the input to the comparator on the scope it doesn't change, so it's a got to be a setup problem.

Can someone provide some pointers on what to look for or what to read about? I thought I had it fixed when I disabled the ADC prior to sleep, but some minor changes in enabling and disabling the COMP_INT starts the problem all over again.

Thanks,

John

Last edited by jecottrell on Sat Mar 17, 2007 4:07 pm; edited 1 time in total
jecottrell



Joined: 16 Jan 2005
Posts: 559
Location: Tucson, AZ

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PostPosted: Sat Mar 17, 2007 3:21 pm     Reply with quote
I think I may have found what I was missing. I need to setup the comparator AGAIN after I disable the ADC. So I specifically have to swap back and forth.....
jecottrell



Joined: 16 Jan 2005
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PostPosted: Sat Mar 17, 2007 4:05 pm     Reply with quote
OK, maybe not. It was still experiencing some erratic behaviour. It seems to act better after putting a delay in after setting up the comparator prior to sleeping.

Needs time to settle?
Ttelmah
Guest
PostPosted: Sun Mar 18, 2007 3:34 am     Reply with quote
Thought.
When you setup the comparator, you can generate a spurious comparator interrupt. I'd suggest, setting up the comparator, pausing for just a couple of machine cycles (remember the interrupts are sampled on the start of the next machine instruction after the event, and the settings are applied at the 'end' of the setting instruction), then clearing the comparator interrupt, before trying to sleep.

Best Wishes
jecottrell



Joined: 16 Jan 2005
Posts: 559
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PostPosted: Sun Mar 18, 2007 9:04 am     Reply with quote
Thanks, that appears to be the source of my problems. I played around with the code just prior to sleep() and found this worked the best:

Code:
setup_comparator(F6_VR_F4_VR);
cmcon_image = CMCON;
bit_set(cmcon_image, COMPINV);
CMCON = cmcon_image;
vref_val = 8;
setup_vref(VREF_LOW | vref_val | VREF_COMP);
delay_cycles(2);
clear_interrupt(INT_COMP);
enable_interrupts (INT_COMP);


However, I still have a question that I didn't ask previously. I only use COMP1. I'd like to be able to tweak the other pins that get setup with my setup statement prior to sleep since I don't use COMP2. A couple of questions in mind.

1. It looks as though the setup_comparator options are 3 bytes long, and I can't seem to find which three are getting set with that statement? (I just had a thought as I was typing, I'll look at the LST file and see if that helps.)

2. Can I make 'custom' setup options for my specific situation:
C1- = F6
C1+ = Vref
(F4)C2- = unused for comparator, but connected to IO
(F5)C2+ = " " "

I know the internal setup options in the PIC allow for all sorts of options, but I'm unsure of what's possible and what's not.

Thanks again,

John

EDIT:

I looked at LST file and learned a little bit...

Code:
.................... setup_comparator(F6_VR_F4_VR);
32F4:  MOVLW  06
32F6:  MOVWF  FB4
32F8:  MOVF   F97,W
32FA:  IORLW  50
32FC:  MOVWF  F97
32FE:  MOVLW  21
3300:  MOVWF  00
3302:  DECFSZ 00,F
3304:  BRA    3302
3306:  MOVF   FB4,W
3308:  BCF    FA1.6


It looks like it also sets the TRISF in the MOVF F97,W line. So, I'm not sure what else happens with the F6_VR_F4_VR vlaue? All I can make out is the CMCON register(FB4) and the TRISF.....

EDIT2:

OK. I'm getting closer.

Code:
#define F6_VR_F4_VR               0x50ff06


Looks like first byte is the TRISF setting and the last byte is CMCON setting.... now if I could figure out the middle one.
Kenny



Joined: 07 Sep 2003
Posts: 173
Location: Australia

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PostPosted: Sun Mar 18, 2007 7:54 pm     Reply with quote
jecottrell wrote:

1. It looks as though the setup_comparator options are 3 bytes long, and I can't seem to find which three are getting set with that statement? (I just had a thought as I was typing, I'll look at the LST file and see if that helps.)

2. Can I make 'custom' setup options for my specific situation:
C1- = F6
C1+ = Vref
(F4)C2- = unused for comparator, but connected to IO
(F5)C2+ = " " "


Edited to clarify meaning and delete error regarding Vref:

1. The middle byte is also used for setting TRISF. In modes where there
are outputs to port pins from the comparator(s), the relevant tris bit(s)
are set to 0 for output.

2. Not if using setup_comparator(F6_VR_F4_VR).
This is mode 110 in Fig. 22-1. In this mode the input multiplexer
'occupies' port pins RF6, RF5, RF4 and RF3.
It acts like a DPDT switch, so can have either RF6 routed to comparator 1
and RF4 routed to comparator 2, or RF5 routed to comparator 1 and
RF3 routed to comparator 2. However, the pins not switched in are not
available for I/O.

If the aim is to free up port pins for general I/O and if only one
comparator is needed, you could use
setup_comparator(F6_F5_NC_NC_OUT_ON_F2) which is mode 001.
The output of comparator 1 is routed to pin RF2, and it is not available
for other I/O. RF4 and RF3 are available for general I/O though.

Then in setup_vref(), OR (with |) VREF_F5 to get Vref on pin RF5.
Vref connects through to the comparator too because the Comparator
Voltage Reference Module is separate from the mode setting and
connects directly to the pin.
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