bi-directional SPI with only one hardware port?

[lifespeed]

I hope I haven't painted myself into a corner, but this could be something of a problem.

I have a PIC18F2420 with one hardware SPI port that needs to receive serial data, then transmit serial data to two other SPI devices. 99.9% of the time it won't be receiving and transmitting at the same time, but of course that is not reliable enough.

I have the SCK pin connected to the master device, as well as switched thru to the two slave devices controlled by the PIC using tri-state buffers triggered by the chip select lines.

The problem here is clock conflicts should the master device start clocking while the PIC happens to be talking to one of the two slave devices using the common clock line.

Do I need to create a software SPI port to avoid this potential clock conflict, or can I do something like using the SS pin to interrupt the PIC, stopping any SPI traffic currently being transmitted by the PIC (this is acceptable, corruption is not an issue). If the SS interrupt method is workable, is it "fast enough" to stop the transmitted clock and prevent conflicts? The PIC is running at 40 MHz, while the SPI master is transmitting data at a 200 KHz.

Thank you,
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Lifespeed

[PCM programmer]

You have some low speed master device with a SPI clock running at
200 KHz. You didn't say, but this might be a PC that's toggling bits on
and off, on a parallel port.

The PC could connect to the hardware SPI pins on the 18F2420.
The SPI module on the 18F2420 would be configured as a slave device.

Then the 18F2420 could have a software SPI master port, which
connects to the other two PICs. Two pins on the 18F2420 could
act as Slave Select signals, one pin going to each PIC. The two
slave PICs would have their hardware SPI modules configured as
slaves.

The SPI clock rate for the PC is 200 KHz. You could easily run the
software SPI master code in the 18F2420 so that the software SPI
clock is 5 MHz. (Or even 1 MHz would be sufficient). You can disable
interrupts in the 18F2420 while you're transmitting a byte with the
software SPI port. Then re-enable them in-between bytes, so your
#INT_SSP interrupt (for the incoming byte from the PC) can be
serviced, if needed.

[lifespeed]

Thanks for your response.

The 200 KHz master is an old Motorola embedded CPU. I want to run a PID control algorithm on the PIC, with the control output being SPI writes to the DAC. The time frame for the controlled event is around 4 ms. A sample rate of 100X (a bit high, but a valid worst-case) is 40 microseconds between samples, with a worst case of a two-byte write every 40 us.

With a 5 MHz SPI clock, this would be 3.2 microseconds just to write to the DAC. I would prefer to use hardware SPI for output and leave the processor free for the PID control task.

Perhaps what you have suggested could be reversed, and I could run an interrupt-driven software SPI slave input?

Are you saying that using hardware input and output with the SS pin triggering the switch between In and Out is impossible? Or are you just suggesting an alternate method? I am not totally opposed to doing software SPI, but I'm wondering if bi-directional hardware SPI is even possible, given that the Master device can preempt the Slave devices without any problems resulting.
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Lifespeed