Timer0 false triggering on enable:

[mng000]

Hi all,

I am looking for a bit of advise - I have been having trouble with timer interrrupts, and have stripped my code down to the bare-essentials to work out what is going wrong.

Basically, i am using a pic16f873A (and tested with a 16f876 to see if the problem persists, which it does). I have setup the timer0 to overflow every few msecs, but after the first enable instruction, it appears to overflow after ~38usec, after which it overflows as expected. I have made sure I have set the timer to 0 before enabling it, so I am not sure what is going wrong.

Code below - am using the test_pin to debug - currently i see it go:
high - delay 100usec - low - delay 100usec - high - delay 38usec - low - then toggle every few msec as expected.

any help most appreciated! Compiler version 3.228.

Cheers!

[drh]

You need to clear the timer0 interrupt flag before you enable the interrupt.
_________________
David

[mng000]

I had tried using:

#bit T0IF=0xB.2

with

do{T0IF=0;}while(T0IF!=0);

at the start of the main function, but now after some playing around, it seems that it works ONLY if I put it after the set_timer0(0) call and not before. Why does it need to be there? Surely setting the timer to zero doesn't trigger the overflow??

[Ttelmah]

First comment, you do not need any of the assembler code or direct accesses you are using. There is a 'clear_interrupt(INT_TIMER0)' instruction which will clear the timer, and a 'delay_cycles(1)' instruction to give the single nop. While the direct accesses don't 'matter', they make things much harder if you latter decide to upgrade to a different chip...
Now when the chip starts, the timer begins counting in instructions, as soon as the code begins. It only 'slows' to 16 instruction steps, when you reprogram the prescaler. Hence it has already wrapped several times, and the interrupt flag is set when you arrive at your enable interrupt. The '38uSec' delay at this point, is the time taken to actually enter the interrupt handler, when the event occurs. A good demonstration of just how major the overhead here is...
I have re-written the demo, in C, and this runs, setting the test pin high at 500.25mSec, and then toggling the pin at 504.38mSec, and next at 508.48mSec.

[mng000]

Thank you very much Ttelmah for the helpful explanation and general pointers - most appreciated!