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markleman
Joined: 30 Mar 2006
Posts: 5
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| PIC12F629 & ENABLE_INTERRUPTS() |
 Posted: Thu Mar 30, 2006 10:15 am |
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Today I was examining a .lst produced by the compiler and was puzzled so I made the minimum example:
| Code: |
#include<C:\Program Files\PICC\Devices\12F629.h>
#FUSES NOWDT,PUT,NOPROTECT,BROWNOUT,INTRC_IO,NOMCLR
void main(void)
{
ENABLE_INTERRUPTS(INT_RA0|INT_RA1|INT_RA3|INT_RA4|INT_RA5)
}
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produced (with my comments added after ;'s) :
| Code: |
CCS PCM C Compiler, Version 3.249, 30611 30-Mar-06 16:38
....snip....
..........ENABLE_INTERRUPTS(INT_RA0|INT_RA1|INT_RA3|INT_RA4|INT_RA5);
000F: BSF 03.6 ; Set bit RP1 in status - reserved on 12F629!
0010: BSF 0B.3 ; set GPIE in INTCON - ok
0011: MOVLW 3B ; mask for RA bits - ok,3B is the right mask
0012: BSF 03.5 ; Set bit RP0 in status - ok back switch to bank1
0013: BCF 03.6 ; Clear bit RP1 in status - reserved on 12F629!
0014: IORWF 16,F ; OR mask in W with IOC and keep in IOC
....snip....
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What are the instructions at 000F and 0013 doing setting and clearing RP1 on a 12F629? The microchip data sheet says 'This bit is reserved and should be maintained as ‘0’'
No where else in my code (the real code not this little example  ) does 03.6 or 03.7 get used only 03.5
Regards, Mark Leman |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Thu Mar 30, 2006 12:50 pm |
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You may have found a long-term bug. I checked PCM vs. 3.191 and
it does the same thing. |
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markleman
Joined: 30 Mar 2006
Posts: 5
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| Posted: Thu Mar 30, 2006 3:08 pm |
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Question is : is it actually going to stop the code working?
So far I think not but I can't rely on that being the case so I think for the moment a little inline assembler might have to go in  |
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markleman
Joined: 30 Mar 2006
Posts: 5
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| Posted: Thu May 11, 2006 7:34 am |
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This problem has been comfirmed by CCS and they say
"This problem is fixed in our version 4 release. We are late getting it out.
Sorry for the delay." |
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