Chinese scales low voltage falling edge

[sadlpx]

Followup to the original post for reading Chinese digital scales output. Lower portion of this post has link to site. Trying to read clock input shifting from ~0 to ~1,6v. Not having any luck pulling into CCP_isr on falling edge. Any suggestions on what can i do to bump up the clock signal to give good solid h_to_l transition.


I'm trying to read the output from some chinese calipers. The output stream is 2x 24bit words back to back (total time about <1 ms), repeating at 50hz or every 20ms. Signal clock starts out with a 15-19 ms low then high for 55us, 24 bit word, high 110us, 24 bit word, high 55us then low for 15-19ms, repeat. Reading seems simple just a shift in routine reading on the falling edge. My problem is I'm having trouble filtering to the first falling edge. how could i set up to use the long (19ms) low to start my read cycle.

More data and scope images on the scales electronics are at this link.

http://www.shumatech.com/support/chinese_scales.htm

[Neutone]

Your ~0 to ~1,6v signal could easily be tied to the base of a transistor to pull down the weak pull up on an input pin. Then you may wait for the input signal to stabalise (20mS between data) and then key off of the changing edge to start reading the signal.