i'm running at 33000 bps on the i2c bus; one pic acts as the master; another PIC as a slave; no other devices on the bus.
The slave's i2c code is isr driven, while the master's i2c code directly uses the MSSP libraries provided by CCS.
Once in a rare occasion, i don't get an ACK back from the slave following a master write of the slave address.
I suspect that my SDA and SCL edges are uneven in my circuit. Is it okay to lower the SDA pullup resistor value so that it swings to its logic level slightly ahead of SCL? I currently have 4.7K on both.
rnielsen
Joined: 23 Sep 2003 Posts: 852 Location: Utah
Posted: Tue May 17, 2005 8:23 am
Your parts won't be damaged if the pull-ups are lowered. I've had them as low as 1K before. Try experimenting with different values. If you're having problems with the integrity of your signals you might want to try a bus conditioner like the LTC1694-1 made by Linear Technology.
Ronald
valemike Guest
Posted: Tue May 17, 2005 8:37 am
Thanks Ronald. Since you responded to this post, I see now that it can be a problem.
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