i have been playing around with FPGA's lately and love the simplicity of state machines in VHDL. is there an easy way to do a state machine design using a PIC micro? what would the format look like?
thanks
bfemmel
Joined: 18 Jul 2004 Posts: 40 Location: San Carlos, CA.
State Machine Stuff
Posted: Fri May 13, 2005 12:33 pm
buckeyes1997,
Here is little piece of code you can modify to make what you want.
Code:
/* State Machine */
currentState = RESET;
while(TRUE) {
switch (currentState) {
case RESET:
/* do setup and reset stuff */
currentState = STATE1;
break
case STATE1:
/* do things for this State */
if (Something_Happens) {
/* do stuff */
currentState = nextState;
}
break
case STATE2:
/* do things for this State */
if (Something_Happens) {
/* do stuff */
currentState = nextState;
}
break
case STATE3:
/* do things for this State */
if (Something_Happens) {
/* do stuff */
currentState = nextState;
}
break
case STATE4:
/* do things for this State */
if (Something_Happens) {
/* do stuff */
currentState = nextState;
}
break
default:
}
}
Good Luck
- Bruce
buckeyes1997
Joined: 12 May 2005 Posts: 15
awesome
Posted: Mon May 16, 2005 7:36 pm
awesome thanks
anyone else have a template or anything to add? have you used the code provided.
matt
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