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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Mon Jan 08, 2007 11:53 am |
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Actually, Ttelmah told you what you needed to do. I didn't look at his
post closely until this morning. You can figure out how to setup the
oscillator by looking at the block diagram of the clock circuit in the
18F4550 data sheet. This is on page 24 (page 26 in the Acrobat reader).
Here is a test program. I tested it on a PicDem2-Plus board with PCH
vs. 3.249. This is with a 20 MHz crystal.
Code: | #include <18F4550.h>
#fuses HSPLL, PLL5, CPUDIV1, NOWDT, PUT, BROWNOUT, NOLVP
#use delay(clock=48000000)
//=================================
void main()
{
// Blink an LED on Pin B0.
while(1)
{
output_high(PIN_B0);
delay_ms(500);
output_low(PIN_B0);
delay_ms(500);
}
} |
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Guest
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Posted: Mon Jan 08, 2007 7:54 pm |
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PCM programmer wrote: | Your original question was how to run at 20 MHz. Now you want to
run with the PLL. You'll have to wait until Monday for that answer,
when I can test it in hardware. |
PCM programmer,
First, I thank you for solving my original timing problem. I am getting excellent performance right now.
I asked the question on PLL just out of curiosity - not a neccessity. It's is not my primary objective.
What I want to know is if the PLL is as stable as the crystal in terms of timing.
If so, I don't think it makes sense to hook up a Crystal in the first place, if the PLL is as stable as a XTAL, since it costs money and takes up board space too.
That's what I need clarification on. |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Tue Jan 09, 2007 12:25 pm |
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Quote: | What I want to know is if the PLL is as stable as the crystal in terms of timing. |
Download the 18F4550 data sheet:
http://ww1.microchip.com/downloads/en/DeviceDoc/39632c.pdf
Go to page 381 (page 383 in the Acrobat Reader).
Look at this section:
TABLE 28-9: PLL CLOCK TIMING SPECIFICATIONS
It has the jitter specifications for the PLL.
I can't find any specs on jitter when using a crystal in HS mode, etc.
I searched the whole Microchip website (using Google).
Quote: |
If so, I don't think it makes sense to hook up a Crystal in the first place,
if the PLL is as stable as a XTAL, since it costs money and takes up board
space too. |
The PLL requires an external crystal or oscillator. Look at page 24
of the data sheet (page 26 in the Acrobat reader), at this diagram:
FIGURE 2.1: PIC18F2455/2550/4455/4550 CLOCK DIAGRAM
It shows that the 96 MHz PLL source comes only from the "Primary
oscillator" pins. You must connect an external crystal or oscillator
to those pins, to provide the PLL a clock signal.
I suspect that you are confusing the Internal RC Oscillator with the PLL.
These are completely different sections in the Clock Diagram.
Go to page 383 in the Acrobat Reader and look at this table for
specifications of the Internal oscillator:
TABLE 28-10: AC CHARACTERISTICS: INTERNAL RC ACCURACY
For more on the Internal RC Oscillator, go to page 29 in the
Acrobat reader and read this section:
2.2.5.3 Internal Oscillator Output Frequency and Drift |
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Ttelmah Guest
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Posted: Tue Jan 09, 2007 4:12 pm |
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PCM programmer hs already covered it pretty thoroughly. The key line, is the end of the first paragraph in section 2.2.5 in the data sheet:
"If the USB peripheral is not used, the internal oscillator may eliminate the need for external oscillator circuits on the OSC1 and/or the OSC2 pins". Note the key part about the USB. The internal oscillator, is _not_ accurate enough to meet the USB requirements, and hence it is not routed to this part of the circuit...
The clock timings for USB, require the device clocks, to be within 0.05%. You may well be suprised by how many devices on the market actually fail in this, when they are taken outside the 'room temperature' enviroment!. The internal oscillator typically manages +/-1%, but in some cases may well be well outside this. Not even close to good enough...
Fortunately, the clock jitter in the PLL, does not effect the actual timing accuracy, and once divided down to feed the USB circuitry, causes no problems.
Best Wishes |
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