Ttelmah
Joined: 11 Mar 2010
Posts: 19369
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 Posted: Sun Jul 14, 2013 12:56 am |
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You will find that the handling of offsetting in assembler addressing, is one of the really annoying things, with I'd say almost 'negative documentation' (what there is makes things less clear...).
Historically, using assembler, was at times necessary, and it still is for something like handling the register saving in INT_GLOBAL. However the number of times it is needed has fallen to nearly zero, and the simple increment is much easier coded by just letting C do it. The actual code generated is the same, provided you ensure that the variable is stored in the right memory page.
You need to ensure 'event' is in the low memory page, or either the assembler, or C, will start having to get involved in page switching....
So the 'simplest CCS version' of your interrupt code, is:
| Code: |
#locate save_w=0x4F
#locate save_status=0x20
int16 event;
#locate event=0x51
#byte status = getenv("SFR:STATUS")
#INT_GLOBAL
void isr()
{
#asm
//store current state of processor
MOVWF save_w
SWAPF status,W
BCF status,5
BCF status,6
MOVWF save_status
// code for isr
#endasm
event++;
clear_interrupt(INT_TIMER0);
#asm
// restore processor and return from interrupt
SWAPF save_status,W
MOVWF status
SWAPF save_w,F
SWAPF save_w,W
#endasm
}
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#locate, generates an int8 variable if one doesn't exist.
Use SFR names, just helps to describe what you are doing.
Unfortunately, use of SFR names, only appeared with V4(ish), and CCS has never updated their examples, so ex_glint.c, show the 'old way'. Also, by default, the compiler wakes using 8bit RAM addressing only (unless *=16 is specified), so they don't bother to ensure the counter is in the bottom page of RAM. A 'caveat'....
It is a case of a rather outdated example.
Best Wishes |
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