Mark
Joined: 07 Sep 2003
Posts: 2838
Location: Atlanta, GA
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| Re: direkt write "Register_list.h" for PIC 18F458 |
 Posted: Fri Oct 18, 2002 6:10 am |
 |
|
Try this one. It gives you easy access to the bits in a register:
| Code: |
#ifndef 18F252_H
#define 18F252_H
#device PIC18F252 *=16
/**************************** Standard Header file for the PIC18F252 device
Program memory: 16384x16 Data RAM: 1536 Stack: 31
I/O: 22 Analog Pins: 5
Data EEPROM: 256
C Scratch area: 00 ID Location: 2000
Fuses: LP,XT,HS,RC,EC,EC_IO,H4,RC_IO,PROTECT,NOPROTECT,OSCSEN
Fuses: NOOSCSEN,NOBROWNOUT,BROWNOUT,WDT1,WDT2,WDT4,WDT8,WDT16,WDT32
Fuses: WDT64,WDT128,WDT,NOWDT,BORV20,BORV27,BORV42,BORV45,PUT,NOPUT
Fuses: CCP2C1,CCP2B3,NOSTVREN,STVREN,NODEBUG,DEBUG,NOLVP,LVP,WRT
Fuses: NOWRT,WRTD,NOWRTD,WRTB,NOWRTB
***************************************************************************/
/********************************************************************** I/O
Discrete I/O Functions: SET_TRIS_x(), OUTPUT_x(), INPUT_x(),
PORT_B_PULLUPS(), INPUT(),
OUTPUT_LOW(), OUTPUT_HIGH(),
OUTPUT_FLOAT(), OUTPUT_BIT()
Constants used to identify pins in the above are:
***************************************************************************/
#define PIN_A0 31744
#define PIN_A1 31745
#define PIN_A2 31746
#define PIN_A3 31747
#define PIN_A4 31748
#define PIN_A5 31749
#define PIN_B0 31752
#define PIN_B1 31753
#define PIN_B2 31754
#define PIN_B3 31755
#define PIN_B4 31756
#define PIN_B5 31757
#define PIN_B6 31758
#define PIN_B7 31759
#define PIN_C0 31760
#define PIN_C1 31761
#define PIN_C2 31762
#define PIN_C3 31763
#define PIN_C4 31764
#define PIN_C5 31765
#define PIN_C6 31766
#define PIN_C7 31767
/********************************************************** Useful defines
Function Registers
***************************************************************************/
unsigned char ADCON0;
#locate ADCON0=0x0FC2
union {
struct {
unsigned char ADON:1;
unsigned char UNUSED0:1;
unsigned char GO:1;
unsigned char CHS0:1;
unsigned char CHS1:1;
unsigned char CHS2:1;
unsigned char ADCS0:1;
unsigned char ADCS1:1;
} ;
struct {
unsigned char UNUSED1:2;
unsigned char NOT_DONE:1;
} ;
struct {
unsigned char UNUSED2:2;
unsigned char DONE:1;
} ;
struct {
unsigned char UNUSED3:2;
unsigned char GO_DONE:1;
} ;
} ADCON0bits;
#locate ADCON0bits=0x0FC2
unsigned char ADCON1;
#locate ADCON1=0x0FC1
struct {
unsigned char PCFG0:1;
unsigned char PCFG1:1;
unsigned char PCFG2:1;
unsigned char PCFG3:1;
unsigned char UNUSED:2;
unsigned char ADCS2:1;
unsigned char ADFM:1;
} ADCON1bits ;
#locate ADCON1bits=0x0FC1
unsigned int16 ADRES;
#locate ADRES=0x0FC3
unsigned char ADRESH;
#locate ADRESH=0x0FC4
unsigned char ADRESL;
#locate ADRESL=0x0FC3
unsigned char BSR;
#locate BSR=0x0FE0
unsigned char CCP1CON;
#locate CCP1CON=0x0FBD
union {
struct {
unsigned char CCP1M0:1;
unsigned char CCP1M1:1;
unsigned char CCP1M2:1;
unsigned char CCP1M3:1;
unsigned char CCP1Y:1;
unsigned char CCP1X:1;
} ;
struct {
unsigned char UNUSED:4;
unsigned char DC1B0:1;
unsigned char DC1B1:1;
} ;
} CCP1CONbits ;
#locate CCP1CONbits=0x0FBD
unsigned char CCP2CON;
#locate CCP2CON=0x0FBA
union {
struct {
unsigned char CCP2M0:1;
unsigned char CCP2M1:1;
unsigned char CCP2M2:1;
unsigned char CCP2M3:1;
unsigned char CCP2Y:1;
unsigned char CCP2X:1;
} ;
struct {
unsigned char UNUSED0:4;
unsigned char DC2B0:1;
unsigned char DC2B1:1;
} ;
struct {
unsigned char UNUSED1:5;
unsigned char DCCPX:1;
} ;
} CCP2CONbits ;
#locate CCP2CONbits=0x0FBA
unsigned int16 CCPR1;
#locate CCPR1=0x0FBE
unsigned char CCPR1H;
#locate CCPR1H=0x0FBF
unsigned char CCPR1L;
#locate CCPR1L=0x0FBE
unsigned int16 CCPR2;
#locate CCPR2=0x0FBB
unsigned char CCPR2H;
#locate CCPR2H=0x0FBC
unsigned char CCPR2L;
#locate CCPR2L=0x0FBB
unsigned char DDRA;
#locate DDRA=0x0F92
struct {
unsigned char RA0:1;
unsigned char RA1:1;
unsigned char RA2:1;
unsigned char RA3:1;
unsigned char RA4:1;
unsigned char RA5:1;
unsigned char RA6:1;
unsigned char RA7:1;
} DDRAbits ;
#locate DDRAbits=0x0F92
unsigned char DDRB;
#locate DDRB=0x0F93
struct {
unsigned char RB0:1;
unsigned char RB1:1;
unsigned char RB2:1;
unsigned char RB3:1;
unsigned char RB4:1;
unsigned char RB5:1;
unsigned char RB6:1;
unsigned char RB7:1;
} DDRBbits ;
#locate DDRBbits=0x0F93
unsigned char DDRC;
#locate DDRC=0x0F94
struct {
unsigned char RC0:1;
unsigned char RC1:1;
unsigned char RC2:1;
unsigned char RC3:1;
unsigned char RC4:1;
unsigned char RC5:1;
unsigned char RC6:1;
unsigned char RC7:1;
} DDRCbits ;
#locate DDRCbits=0x0F94
unsigned char DDRD;
#locate DDRD=0x0F95
struct {
unsigned char RD0:1;
unsigned char RD1:1;
unsigned char RD2:1;
unsigned char RD3:1;
unsigned char RD4:1;
unsigned char RD5:1;
unsigned char RD6:1;
unsigned char RD7:1;
} DDRDbits ;
#locate DDRDbits=0x0F95
unsigned char DDRE;
#locate DDRE=0x0F96
struct {
unsigned char RE0:1;
unsigned char RE1:1;
unsigned char RE2:1;
unsigned char RE3:1;
unsigned char RE4:1;
unsigned char RE5:1;
unsigned char RE6:1;
unsigned char RE7:1;
} DDREbits ;
#locate DDREbits=0x0F96
unsigned char DDRF;
#locate DDRF=0x0F97
struct {
unsigned char RF0:1;
unsigned char RF1:1;
unsigned char RF2:1;
unsigned char RF3:1;
unsigned char RF4:1;
unsigned char RF5:1;
unsigned char RF6:1;
unsigned char RF7:1;
} DDRFbits ;
#locate DDRFbits=0x0F97
unsigned char DDRG;
#locate DDRG=0x0F98
struct {
unsigned char RG0:1;
unsigned char RG1:1;
unsigned char RG2:1;
unsigned char RG3:1;
unsigned char RG4:1;
} DDRGbits ;
#locate DDRGbits=0x0F98
unsigned char DDRH;
#locate DDRH=0x0F99
struct {
unsigned char RH0:1;
unsigned char RH1:1;
unsigned char RH2:1;
unsigned char RH3:1;
unsigned char RH4:1;
unsigned char RH5:1;
unsigned char RH6:1;
unsigned char RH7:1;
} DDRHbits ;
#locate DDRHbits=0x0F99
unsigned char DDRJ;
#locate DDRJ=0x0F9A
struct {
unsigned char RJ0:1;
unsigned char RJ1:1;
unsigned char RJ2:1;
unsigned char RJ3:1;
unsigned char RJ4:1;
unsigned char RJ5:1;
unsigned char RJ6:1;
unsigned char RJ7:1;
} DDRJbits ;
#locate DDRJbits=0x0F9A
unsigned char EEADR;
#locate EEADR=0x0FA9
unsigned char EECON1;
#locate EECON1=0x0FA6
struct {
unsigned char RD:1;
unsigned char WR:1;
unsigned char WREN:1;
unsigned char WRERR:1;
unsigned char FREE:1;
unsigned char UNUSED:1;
unsigned char CFGS:1;
unsigned char EEPGD:1;
} EECON1bits ;
#locate EECON1bits=0x0FA6
unsigned char EECON2;
#locate EECON2=0x0FA7
unsigned char EEDATA;
#locate EEDATA=0x0FA8
unsigned int16 FSR0;
#locate FSR0=0x0FE9
unsigned char FSR0H;
#locate FSR0H=0x0FEA
unsigned char FSR0L;
#locate FSR0L=0x0FE9
unsigned int16 FSR1;
#locate FSR1=0x0FE1
unsigned char FSR1H;
#locate FSR1H=0x0FE2
unsigned char FSR1L;
#locate FSR1L=0x0FE1
unsigned int16 FSR2;
#locate FSR2=0x0FD9
unsigned char FSR2H;
#locate FSR2H=0x0FDa
unsigned char FSR2L;
#locate FSR2L=0x0FD9
unsigned char INDF0;
#locate INDF0=0x0FEF
unsigned char INDF1;
#locate INDF1=0x0FE7
unsigned char INDF2;
#locate INDF2=0x0FDF
unsigned char INTCON;
#locate INTCON=0x0FF2
struct
{
unsigned char RBIF:1;
unsigned char INT0F:1;
unsigned char T0IF:1;
unsigned char RBIE:1;
unsigned char INT0E:1;
unsigned char T0IE:1;
unsigned char PEIE:1;
unsigned char GIE:1;
} INTCONbits;
#locate INTCONbits=0x0FF2
unsigned char INTCON2;
#locate INTCON2=0x0FF1
struct
{
unsigned char RBIP:1;
unsigned char INT3P:1;
unsigned char T0IP:1;
unsigned char INTEDG3:1;
unsigned char INTEDG2:1;
unsigned char INTEDG1:1;
unsigned char INTEDG0:1;
unsigned char RBPU:1;
} INTCON2bits ;
#locate INTCON2bits=0x0FF1
unsigned char INTCON3;
#locate INTCON3=0x0FF0
struct
{
unsigned char INT1IF:1;
unsigned char INT2IF:1;
unsigned char INT3IF:1;
unsigned char INT1IE:1;
unsigned char INT2IE:1;
unsigned char INT3IE:1;
unsigned char INT1IP:1;
unsigned char INT2IP:1;
} INTCON3bits ;
#locate INTCON3bits=0x0FF0
unsigned char IPR1;
#locate IPR1=0x0F9F
struct {
unsigned char TMR1IP:1;
unsigned char TMR2IP:1;
unsigned char CCP1IP:1;
unsigned char SSPIP:1;
unsigned char TXIP:1;
unsigned char RCIP:1;
unsigned char ADIP:1;
unsigned char PSPIP:1;
} IPR1bits ;
#locate IPR1bits=0x0F9F
unsigned char IPR2;
#locate IPR2=0x0FA2
struct {
unsigned char CCP2IP:1;
unsigned char TMR3IP:1;
unsigned char LVDIP:1;
unsigned char BCLIP:1;
unsigned char EEIP:1;
} IPR2bits ;
#locate IPR2bits=0x0FA2
unsigned char LATA;
#locate LATA=0x0F89
struct {
unsigned char LATA0:1;
unsigned char LATA1:1;
unsigned char LATA2:1;
unsigned char LATA3:1;
unsigned char LATA4:1;
unsigned char LATA5:1;
} LATAbits ;
#locate LATAbits=0x0F89
unsigned char LATB;
#locate LATB=0x0F8A
struct {
unsigned char LATB0:1;
unsigned char LATB1:1;
unsigned char LATB2:1;
unsigned char LATB3:1;
unsigned char LATB4:1;
unsigned char LATB5:1;
unsigned char LATB6:1;
unsigned char LATB7:1;
} LATBbits ;
#locate LATBbits=0x0F8A
unsigned char LATC;
#locate LATC=0x0F8B
struct {
unsigned char LATC0:1;
unsigned char LATC1:1;
unsigned char LATC2:1;
unsigned char LATC3:1;
unsigned char LATC4:1;
unsigned char LATC5:1;
unsigned char LATC6:1;
unsigned char LATC7:1;
} LATCbits ;
#locate LATCbits=0x0F8B
unsigned char LATD;
#locate LATD=0x0F8C
struct {
unsigned char LATD0:1;
unsigned char LATD1:1;
unsigned char LATD2:1;
unsigned char LATD3:1;
unsigned char LATD4:1;
unsigned char LATD5:1;
unsigned char LATD6:1;
unsigned char LATD7:1;
} LATDbits ;
#locate LATDbits=0x0F8C
unsigned char LATE;
#locate LATE=0x0F8D
struct {
unsigned char LATE0:1;
unsigned char LATE1:1;
unsigned char LATE2:1;
unsigned char LATE3:1;
unsigned char LATE4:1;
unsigned char LATE5:1;
unsigned char LATE6:1;
unsigned char LATE7:1;
} LATEbits ;
#locate LATEbits=0x0F8D
unsigned char LVDCON;
#locate LVDCON=0x0FD2
struct {
unsigned char LVDL0:1;
unsigned char LVDL1:1;
unsigned char LVDL2:1;
unsigned char LVDL3:1;
unsigned char LVDEN:1;
unsigned char VRST:1;
} LVDCONbits ;
#locate LVDCONbits=0x0FD2
unsigned char OSCCON;
#locate OSCCON=0x0FD3
struct {
unsigned char SCS:1;
} OSCCONbits ;
#locate OSCCONbits=0x0FD3
unsigned char PIE1;
#locate PIE1=0x0F9D
struct {
unsigned char TMR1IE:1;
unsigned char TMR2IE:1;
unsigned char CCP1IE:1;
unsigned char SSPIE:1;
unsigned char TXIE:1;
unsigned char RCIE:1;
unsigned char ADIE:1;
unsigned char PSPIE:1;
} PIE1bits ;
#locate PIE1bits=0x0F9D
unsigned char PIE2;
#locate PIE2=0x0FA0
struct {
unsigned char CCP2IE:1;
unsigned char TMR3IE:1;
unsigned char LVDIE:1;
unsigned char BCLIE:1;
unsigned char EEIE:1;
} PIE2bits ;
#locate PIE2bits=0x0FA0
unsigned char PIR1;
#locate PIR1=0x0F9E
struct {
unsigned char TMR1IF:1;
unsigned char TMR2IF:1;
unsigned char CCP1IF:1;
unsigned char SSPIF:1;
unsigned char TXIF:1;
unsigned char RCIF:1;
unsigned char ADIF:1;
unsigned char PSPIF:1;
} PIR1bits ;
#locate PIR1bits=0x0F9E
unsigned char PIR2;
#locate PIR2=0x0FA1
struct {
unsigned char CCP2IF:1;
unsigned char TMR3IF:1;
unsigned char LVDIF:1;
unsigned char BCLIF:1;
unsigned char EEIF:1;
} PIR2bits ;
#locate PIR2bits=0x0FA1
unsigned char PORTA;
#locate PORTA=0x0F80
struct
{
unsigned char RA0:1;
unsigned char RA1:1;
unsigned char RA2:1;
unsigned char RA3:1;
unsigned char RA4:1;
unsigned char RA5:1;
unsigned char RA6:1;
} PORTAbits ;
#locate PORTAbits=0x0F80
unsigned char PORTB;
#locate PORTB=0x0F81
struct
{
unsigned char RB0:1;
unsigned char RB1:1;
unsigned char RB2:1;
unsigned char RB3:1;
unsigned char RB4:1;
unsigned char RB5:1;
unsigned char RB6:1;
unsigned char RB7:1;
} PORTBbits ;
#locate PORTBbits=0x0F81
unsigned char PORTC;
#locate PORTC=0x0F82
struct
{
unsigned char RC0:1;
unsigned char RC1:1;
unsigned char RC2:1;
unsigned char RC3:1;
unsigned char RC4:1;
unsigned char RC5:1;
unsigned char RC6:1;
unsigned char RC7:1;
} PORTCbits ;
#locate PORTCbits=0x0F82
unsigned char PR2;
#locate PR2=0x0FCB
unsigned int16 PROD;
#locate PROD=0x0FF3
unsigned char PRODH;
#locate PRODH=0x0FF4
unsigned char PRODL;
#locate PRODL=0x0FF3
unsigned char RCON;
#locate RCON=0x0FD0
struct
{
unsigned char BOR:1;
unsigned char POR:1;
unsigned char PD:1;
unsigned char TO:1;
unsigned char RI:1;
unsigned char UNUSED1:1;
unsigned char LWRT:1;
unsigned char IPEN:1;
} RCONbits ;
#locate RCONbits=0x0FD0
unsigned char RCREG;
#locate RCREG=0x0FAE
unsigned char RCSTA;
#locate RCSTA=0x0FAB
struct {
unsigned char RX9D:1;
unsigned char OERR:1;
unsigned char FERR:1;
unsigned char ADDEN:1;
unsigned char CREN:1;
unsigned char SREN:1;
unsigned char RX9:1;
unsigned char SPEN:1;
} RCSTAbits ;
#locate RCSTAbits=0x0FAB
unsigned char SPBRG;
#locate SPBRG=0x0FAF
unsigned char SSPADD;
#locate SSPADD=0x0FC8
unsigned char SSPBUF;
#locate SSPBUF=0x0FC9
unsigned char SSPCON1;
#locate SSPCON1=0x0FC6
struct {
unsigned char SSPM0:1;
unsigned char SSPM1:1;
unsigned char SSPM2:1;
unsigned char SSPM3:1;
unsigned char CKP:1;
unsigned char SSPEN:1;
unsigned char SSPOV:1;
unsigned char WCOL:1;
} SSPCON1bits ;
#locate SSPCON1bits=0x0FC6
unsigned char SSPCON2;
#locate SSPCON2=0x0FC5
struct {
unsigned char SEN:1;
unsigned char RSEN:1;
unsigned char PEN:1;
unsigned char RCEN:1;
unsigned char ACKEN:1;
unsigned char ACKDT:1;
unsigned char ACKSTAT:1;
unsigned char GCEN:1;
} SSPCON2bits ;
#locate SSPCON2bits=0x0FC5
unsigned char SSPSTAT;
#locate SSPSTAT=0x0FC7
struct {
unsigned char BF:1;
unsigned char UA:1;
unsigned char R_W:1;
unsigned char S:1;
unsigned char P:1;
unsigned char D_A:1;
unsigned char CKE:1;
unsigned char SMP:1;
} SSPSTATbits ;
#locate SSPSTATbits=0x0FC7
unsigned char STATUS;
#locate STATUS=0x0FD8
struct {
unsigned char C:1;
unsigned char DC:1;
unsigned char Z:1;
unsigned char OV:1;
unsigned char N:1;
} STATUSbits ;
#locate STATUSbits=0x0FD8
unsigned char T1CON;
#locate T1CON=0x0FCD
struct
{
unsigned char TMR1ON:1;
unsigned char TMR1CS:1;
unsigned char NOT_T1SYNC:1;
unsigned char T1OSCEN:1;
unsigned char T1CKPS0:1;
unsigned char T1CKPS1:1;
unsigned char UNUSED0:1;
unsigned char RD16:1;
} T1CONbits ;
#locate T1CONbits=0x0FCD
unsigned char T2CON;
#locate T2CON=0x0FCA
struct {
unsigned char T2CKPS0:1;
unsigned char T2CKPS1:1;
unsigned char TMR2ON:1;
unsigned char TOUTPS0:1;
unsigned char TOUTPS1:1;
unsigned char TOUTPS2:1;
unsigned char TOUTPS3:1;
} T2CONbits ;
#locate T2CONbits=0x0FCA
unsigned int16 TMR0;
#locate TMR0=0x0FD6
unsigned char TMR0H;
#locate TMR0H=0x0FD7
unsigned char TMR0L;
#locate TMR0L=0x0FD6
unsigned int16 TMR1;
#locate TMR1=0x0FCE
unsigned char TMR1H;
#locate TMR1H=0x0FCF
unsigned char TMR1L;
#locate TMR1L=0x0FCE
unsigned char TMR2;
#locate TMR2=0x0FCC
unsigned char TRISA;
#locate TRISA=0x0F92
struct {
unsigned char TRISA0:1;
unsigned char TRISA1:1;
unsigned char TRISA2:1;
unsigned char TRISA3:1;
unsigned char TRISA4:1;
unsigned char TRISA5:1;
} TRISAbits ;
#locate TRISAbits=0x0F92
unsigned char TRISB;
#locate TRISB=0x0F93
struct {
unsigned char TRISB0:1;
unsigned char TRISB1:1;
unsigned char TRISB2:1;
unsigned char TRISB3:1;
unsigned char TRISB4:1;
unsigned char TRISB5:1;
unsigned char TRISB6:1;
unsigned char TRISB7:1;
} TRISBbits ;
#locate TRISBbits=0x0F93
unsigned char TRISC;
#locate TRISC=0x0F94
struct {
unsigned char TRISC0:1;
unsigned char TRISC1:1;
unsigned char TRISC2:1;
unsigned char TRISC3:1;
unsigned char TRISC4:1;
unsigned char TRISC5:1;
unsigned char TRISC6:1;
unsigned char TRISC7:1;
} TRISCbits ;
#locate TRISCbits=0x0F94
unsigned char TRISD;
#locate TRISD=0x0F95
struct {
unsigned char TRISD0:1;
unsigned char TRISD1:1;
unsigned char TRISD2:1;
unsigned char TRISD3:1;
unsigned char TRISD4:1;
unsigned char TRISD5:1;
unsigned char TRISD6:1;
unsigned char TRISD7:1;
} TRISDbits ;
#locate TRISDbits=0x0F95
unsigned char TRISE;
#locate TRISE=0x0F96
struct {
unsigned char TRISE0:1;
unsigned char TRISE1:1;
unsigned char TRISE2:1;
unsigned char TRISE3:1;
unsigned char TRISE4:1;
unsigned char TRISE5:1;
unsigned char TRISE6:1;
unsigned char TRISE7:1;
} TRISEbits ;
#locate TRISEbits=0x0F96
unsigned char TXREG;
#locate TXREG=0x0FAD
unsigned char TXSTA;
#locate TXSTA=0x0FAC
struct {
unsigned char TX9D:1;
unsigned char TRMT:1;
unsigned char BRGH:1;
unsigned char UNUSED:1;
unsigned char SYNC:1;
unsigned char TXEN:1;
unsigned char TX9:1;
unsigned char CSRC:1;
} TXSTAbits ;
#locate TXSTAbits=0x0FAC
unsigned char W;
#locate W=0x0FE8
unsigned char WDTCON;
#locate WDTCON=0x0FD1
struct
{
unsigned char SWDTEN:1;
} WDTCONbits ;
#locate WDTCONbits=0x0FD1
unsigned char WREG;
#locate WREG=0x0FE8
#define getc getch
#define getchar getch
#define putc putchar
/***************************************************************** Control
Control Functions: RESET_CPU(), SLEEP(), RESTART_CAUSE()
Constants returned from RESTART_CAUSE() are:
***************************************************************************/
#define WDT_TIMEOUT 4
#define MCLR_FROM_SLEEP 8
#define NORMAL_POWER_UP 12
#define BROWNOUT_RESTART 14
/***************************************************************** Timer 0
Timer 0 (AKA RTCC)Functions: SETUP_COUNTERS() or SETUP_TIMER0(),
SET_TIMER0() or SET_RTCC(),
GET_TIMER0() or GET_RTCC()
Constants used for SETUP_TIMER0() are:
***************************************************************************/
#define RTCC_INTERNAL 0
#define RTCC_EXT_L_TO_H 32
#define RTCC_EXT_H_TO_L 48
#define RTCC_DIV_2 0
#define RTCC_DIV_4 1
#define RTCC_DIV_8 2
#define RTCC_DIV_16 3
#define RTCC_DIV_32 4
#define RTCC_DIV_64 5
#define RTCC_DIV_128 6
#define RTCC_DIV_256 7
#define WDT_18MS 8
#define WDT_36MS 9
#define WDT_72MS 10
#define WDT_144MS 11
#define WDT_288MS 12
#define WDT_576MS 13
#define WDT_1152MS 14
#define WDT_2304MS 15
#define RTCC_OFF 0x80
#define RTCC_8_BIT 0x40
/******************************************************
Constants used for SETUP_COUNTERS() are the above
constants for the 1st param and the following for
the 2nd param:
******************************************************/
/********************************************************************* WDT
Watch Dog Timer Functions: SETUP_WDT() or SETUP_COUNTERS() (see above)
RESTART_WDT()
***************************************************************************/
#define WDT_ON 0x100
#define WDT_OFF 0
/***************************************************************** Timer 1
Timer 1 Functions: SETUP_TIMER_1, GET_TIMER1, SET_TIMER1
Constants used for SETUP_TIMER_1() are:
(or (via |) together constants from each group)
***************************************************************************/
#define T1_DISABLED 0
#define T1_INTERNAL 0x85
#define T1_EXTERNAL 0x87
#define T1_EXTERNAL_SYNC 0x83
#define T1_CLK_OUT 8
#define T1_DIV_BY_1 0
#define T1_DIV_BY_2 0x10
#define T1_DIV_BY_4 0x20
#define T1_DIV_BY_8 0x30
#byte TIMER_1_LOW= 0xFD6
#byte TIMER_1_HIGH= 0xFD7
/***************************************************************** Timer 2
Timer 2 Functions: SETUP_TIMER_2, GET_TIMER2, SET_TIMER2
Constants used for SETUP_TIMER_2() are:
***************************************************************************/
#define T2_DISABLED 0
#define T2_DIV_BY_1 4
#define T2_DIV_BY_4 5
#define T2_DIV_BY_16 6
#define T2_POSTSCALE_1 0x00
#define T2_POSTSCALE_2 0x80
#define T2_POSTSCALE_3 0x10
#define T2_POSTSCALE_4 0x18
#define T2_POSTSCALE_5 0x20
#define T2_POSTSCALE_6 0x28
#define T2_POSTSCALE_7 0x30
#define T2_POSTSCALE_8 0x38
#define T2_POSTSCALE_9 0x40
#define T2_POSTSCALE_10 0x48
#define T2_POSTSCALE_11 0x50
#define T2_POSTSCALE_12 0x58
#define T2_POSTSCALE_13 0x60
#define T2_POSTSCALE_14 0x68
#define T2_POSTSCALE_15 0x70
#define T2_POSTSCALE_16 0x78
#byte TIMER_2= 0xFCC
/***************************************************************** Timer 3
Timer 3 Functions: SETUP_TIMER_3, GET_TIMER3, SET_TIMER3
Constants used for SETUP_TIMER_3() are:
(or (via |) together constants from each group)
***************************************************************************/
#define T3_DISABLED 0
#define T3_INTERNAL 0x85
#define T3_EXTERNAL 0x87
#define T3_EXTERNAL_SYNC 0x83
#define T3_DIV_BY_1 0
#define T3_DIV_BY_2 0x10
#define T3_DIV_BY_4 0x20
#define T3_DIV_BY_8 0x30
/********************************************************************* CCP
CCP Functions: SETUP_CCPx, SET_PWMx_DUTY
CCP Variables: CCP_x, CCP_x_LOW, CCP_x_HIGH
Constants used for SETUP_CCPx() are:
***************************************************************************/
#define CCP_OFF 0
#define CCP_CAPTURE_FE 4
#define CCP_CAPTURE_RE 5
#define CCP_CAPTURE_DIV_4 6
#define CCP_CAPTURE_DIV_16 7
#define CCP_COMPARE_SET_ON_MATCH 8
#define CCP_COMPARE_CLR_ON_MATCH 9
#define CCP_COMPARE_INT 0xA
#define CCP_COMPARE_RESET_TIMER 0xB
#define CCP_PWM 0xC
#define CCP_PWM_PLUS_1 0x1c
#define CCP_PWM_PLUS_2 0x2c
#define CCP_PWM_PLUS_3 0x3c
#define CCP_USE_TIMER3 0x100
long CCP_1;
#byte CCP_1 = 0xfbe
#byte CCP_1_LOW= 0xfbe
#byte CCP_1_HIGH= 0xfbf
long CCP_2;
#byte CCP_2 = 0xfbb
#byte CCP_2_LOW= 0xfbb
#byte CCP_2_HIGH= 0xfbc
/******************************************************************** SPI
SPI Functions: SETUP_SPI, SPI_WRITE, SPI_READ, SPI_DATA_IN
Constants used in SETUP_SSP() are:
***************************************************************************/
#define SPI_MASTER 0x20
#define SPI_SLAVE 0x24
#define SPI_L_TO_H 0
#define SPI_H_TO_L 0x10
#define SPI_CLK_DIV_4 0
#define SPI_CLK_DIV_16 1
#define SPI_CLK_DIV_64 2
#define SPI_CLK_T2 3
#define SPI_SS_DISABLED 1
#define SPI_SAMPLE_AT_END 0x8000
#define SPI_XMIT_L_TO_H 0x4000
/********************************************************************* ADC
ADC Functions: SETUP_ADC(), SETUP_ADC_PORTS() (aka SETUP_PORT_A),
SET_ADC_CHANNEL(), READ_ADC()
Constants used in SETUP_ADC_PORTS() are:
***************************************************************************/
#define NO_ANALOGS 0x06 /* None */
#define ALL_ANALOG 0x00 /* RA0 RA1 RA2 RA3 RA5 RE0 RE1 RE2 Ref=Vdd */
#define ANALOG_RA3_REF 0x01 /* RA0 RA1 RA2 RA5 RE0 RE1 RE2 Ref=RA3 */
#define A_ANALOG 0x02 /* RA0 RA1 RA2 RA3 RA5 Ref=Vdd */
#define A_ANALOG_RA3_REF 0x03 /* RA0 RA1 RA2 RA5 Ref=RA3 */
#define RA0_RA1_RA3_ANALOG 0x04 /* RA0 RA1 RA3 Ref=Vdd */
#define RA0_RA1_ANALOG_RA3_REF 0x05 /* RA0 RA1 Ref=RA3 */
#define ANALOG_RA3_RA2_REF 0x08
#define ANALOG_NOT_RE1_RE2 0x09
#define ANALOG_NOT_RE1_RE2_REF_RA3 0x0A
#define ANALOG_NOT_RE1_RE2_REF_RA3_RA2 0x0B
#define A_ANALOG_RA3_RA2_REF 0x0C
#define RA0_RA1_ANALOG_RA3_RA2_REF 0x0D
#define RA0_ANALOG 0x0E
#define RA0_ANALOG_RA3_RA2_REF 0x0F
#define RIGHT_JUSTIFIED 0x80
/* Constants used for SETUP_ADC() are: */
#define ADC_OFF 0
#define ADC_START 4
#define ADC_CLOCK_DIV_2 1
#define ADC_CLOCK_DIV_4 0x101
#define ADC_CLOCK_DIV_8 0x41
#define ADC_CLOCK_DIV_16 0x141
#define ADC_CLOCK_DIV_32 0x81
#define ADC_CLOCK_DIV_64 0x181
#define ADC_CLOCK_INTERNAL 0xc1
#define ADC_DONE_MASK 0x04
/********************************************************************* INT
Interrupt Functions: ENABLE_INTERRUPTS(), DISABLE_INTERRUPTS(),
EXT_INT_EDGE()
Constants used in EXT_INT_EDGE() are:
***************************************************************************/
#define L_TO_H 0x40
#define H_TO_L 0
/* Constants used in ENABLE/DISABLE_INTERRUPTS() are: */
#define GLOBAL 0xF2C0
#define INT_RTCC 0xF220
#define INT_TIMER0 0xF220
#define INT_TIMER1 0x9D01
#define INT_TIMER2 0x9D02
#define INT_TIMER3 0xA002
#define INT_EXT 0xF210
#define INT_EXT1 0xF008
#define INT_EXT2 0xF010
#define INT_RB 0xF208
#define INT_AD 0x9D40
#define INT_RDA 0x9D20
#define INT_TBE 0x9D10
#define INT_SSP 0x9D08
#define INT_CCP1 0x9D04
#define INT_CCP2 0xA001
#endif /* 18F252_H */
|
:=Hi Folks,
:=
:=I'm gonna start a development for my university wíth the PIC 18F458 very soon.
:=The CCS PCWH does not include a file like the P18F458.inc file (a part of the mplab-IDE).
:=
:=I don't want to spent so much time writing a own register list like
:=#define T0CON XYZ
:=
:=Does anybody own a register file for the 18F458 which he could send me?
:=
:=TA
:=
:=Thomas
___________________________
This message was ported from CCS's old forum
Original Post ID: 7974 |
|
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