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Ttelmah
Joined: 11 Mar 2010
Posts: 19510
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 Posted: Thu Jun 17, 2021 8:13 am |
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Lets make a comment.
The edge changing code has worked many times for people here in the past.
However this chip is more complex, since it has three EXT interrupts. I'd
suspect you probably have to specify which interrupt is involved in the
change code to make it work.
However 'why use this'?. This PIC also supports IOC on this pin. Much
simpler. So:
| Code: |
#include <18f26k42.H>
#device ADC = 10
#include <BMLCD420.c>
#include <stdio.h>
#include <time.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#fuses NOWDT, NOPROTECT, NOPUT, NOLVP
#use delay(internal = 4MHz)
#define inputsignal PIN_B0
#define gate2 PIN_B2
//#PIN_SELECT INT0=PIN_B0
#byte IOCBF=getenv("SFR:IOCBF")
#INT_IOC // external interrupt ISR
void EXT_ISR()
{
int1 high;
if(input(inputsignal) == 1)
{
high=TRUE;
delay_cycles(1);
}
else
{
high=FALSE;
delay_cycles(1);
}
IOCBF=FALSE;
}
void main()
{
output_drive(gate2);
output_low(gate2);
IOCBF=FALSE;
clear_interrupt(INT_IOC);
enable_interrupts(INT_IOC_B0); //enable IOC in both directions on B0
enable_interrupts(GLOBAL);
while(TRUE)
{
delay_cycles(1);
}
}
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This enables IOC on pin B0 for both directions. Much easier. The only
complexity for this is you have to manually clear the IOCBF.0 bit
before the interrupt can be cleared. I've done this by just defining the
register and clearing this. |
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matthewmilford
Joined: 09 Feb 2021
Posts: 23
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| Posted: Thu Jun 17, 2021 9:00 am |
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Everyone,
I finally got a working code. A bit strange as, so far as I can tell the ext_int_edge command is not working properly on this chip. So, I decided to change the bits manually and with a bit of twiddling here is a small working code for doing both edges.
| Code: |
#include <18f26k42.H>
#device ADC = 10
#include <BMLCD420.c>
#include <stdio.h>
#include <time.h>
#include <math.h>
#include <stdlib.h>
#include <string.h>
#fuses NOWDT, NOPROTECT, NOPUT, NOLVP
#use delay(internal = 4MHz)
#define inputsignal PIN_B0
#define gate2 PIN_B2
#byte OPTION_REG = GETENV("SFR:INTCON0") // get OPTION_REG register address
#bit INTEDG = OPTION_REG.0
#INT_EXT // external interrupt ISR
void EXT_ISR()
{
delay_ms(2);
output_high(gate2);
delay_us(50);
output_low(gate2);
if(input(inputsignal) == 1)
{
delay_cycles(1);
//ext_int_edge(H_TO_L);
INTEDG = 0;
}
else
{
delay_cycles(1);
//ext_int_edge(L_TO_H);
INTEDG = 1;
}
}
void main()
{
output_drive(gate2);
output_low(gate2);
clear_interrupt(INT_EXT);
enable_interrupts(INT_EXT);
enable_interrupts(GLOBAL);
ext_int_edge(L_TO_H);
while(TRUE)
{
delay_cycles(1);
}
}
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PrinceNai
Joined: 31 Oct 2016
Posts: 479
Location: Montenegro
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| Posted: Thu Jun 17, 2021 10:15 am |
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It's nice you have a working code and also that Mr. Ttelmah posted an alternative. And I do like his "only complexity" thing. One line, once :-). I'd like all the things to be that complex. BTW, what chip are you using for ZCD, to buy some?
Regards,
Samo |
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PrinceNai
Joined: 31 Oct 2016
Posts: 479
Location: Montenegro
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| Posted: Thu Jun 17, 2021 11:17 am |
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| It would be interesting to see the .lst code for this part of program with int_ext and manual change of the SFR. Maybe your version of CCS is the culprit for this behavior. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19510
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| Posted: Thu Jun 17, 2021 11:23 am |
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Yes. The interesting thing for me, is I haven't kept 5.102. I don't keep
versions where I have found a major issue. |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19510
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| Posted: Fri Jun 18, 2021 1:12 am |
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As I guessed (and mentioned earlier), the issue is simply that your code is
not telling the compiler 'which' interrupt to set the edge on.
You need:
| Code: |
#INT_EXT // external interrupt ISR
void EXT_ISR()
{
int1 high;
if(input(inputsignal) == 1)
{
high=TRUE;
delay_cycles(1);
ext_int_edge(0,H_TO_L);
}
else
{
high=FALSE;
delay_cycles(1);
ext_int_edge(0,L_TO_H);
}
}
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Note the '0'.
Though the manual says these should default to the first interrupt, checking
the assembly on 5.101 (since I don't have 5.102), shows that without this
the second entry is accessing the FSR register, and not the INTCON0
register. Add the zero, and the first clears INT0EDG bit while the second
sets it. |
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