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Strange behavior of spi_write when interfacing a DAC via SPI

 
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Zer0flag
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Strange behavior of spi_write when interfacing a DAC via SPI
PostPosted: Sat Sep 15, 2007 1:11 pm     Reply with quote

Hi all!

From a PIC18F4620 running @ 20 MHz I'm interfacing a DAC (DAC7634) through SPI.

To send a value to the DAC for output I use three consecutive spi_write(...) commands:

spi_write(control_byte);
spi_write(value_msb);
spi_write(value_lsb);

My problem is the following:
If I setup the SPI interface to SPI_CLK_DIV_16 = 1.25 MHz everything is ok. If I switch the speed to SPI_CLK_DIV_64 = 0.3125 MHz the program "freezes" after sending the first control byte via spi_write(control_byte). Although the SPI speed is now lower I have to insert at least a delay of delay_us(2) between the spi_write commands in order to make things work again.

Any idea why this problem occurs with SPI_CLK_DIV_64 ???

Thanks for any hint!

Zer0flag
Ttelmah
Guest







PostPosted: Sat Sep 15, 2007 4:20 pm     Reply with quote

There are so many errata for the MSSP module on these chips, that I'd say the answer is probably in one of these. Something like thirty or more 'known' problems, and possibly more undocumented ones... :-(
You would need to look through them all.

Best Wishes
Zer0flag
Guest







PostPosted: Sun Sep 16, 2007 12:50 am     Reply with quote

Uh oh :( Many thanks for the info - I'm gonna check this...

Best regards,
Zer0flag
Zer0flag
Guest







PostPosted: Sun Sep 16, 2007 3:34 am     Reply with quote

Looks like this is my problem (quote from the silicon errata):

Quote:

With MSSP in SPI Master mode, FOSC/64 or
Timer2/2 clock rate, and CKE = 0, a write collision
may occur if SSPBUF is loaded immediately after
the transfer is complete. A delay may be required
after the MSSP Interrupt Flag bit, SSPIF, is set or
the Buffer Full bit, BF, is set and before writing
SSPBUF. If the delay is insufficiently short, a write
collision may occur as indicated by the WCOL bit
being set.
Work around
Add a software delay of one SCK period after
detecting the completed transfer and prior to
updating the SSPBUF contents. Verify the WCOL
bit is clear after writing SSPBUF. If the WCOL is
set, clear the bit in software and rewrite the
SSPBUF register.


Many thanks again Ttelmah!
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