CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to CCS Technical Support

40MIPs and 70MIPs

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
neochrome32



Joined: 09 Jun 2013
Posts: 153

View user's profile Send private message Visit poster's website

40MIPs and 70MIPs
PostPosted: Thu Aug 07, 2014 7:46 pm     Reply with quote

Hi guys, i got two chips

a dsPIC33FJ128MC804 - 40MIPs
and
a PIC24EP64GP204 - 70MIPs

now the issue i am having is while I'm do believe I've got them running at their highest speeds,

i don't see any significant speed improvements! only a slight boots

a 10MIPS and a 16 MIPS there is a big difference (those are 8bit)

I've also ran a SOFTWARE SPI for an SDCARD sequence

I'm using 2, one fast, one slow (slow for initial speeds) while this is a great solution to an already created device, the 70MIPs even at full speed software should match if not out perform? the 40MIPs (hardware spi)

OOORRR is software spi just simply bottle necking because it is a form of bit-banging?

(I've been awake a few more hours after bed so my brains a little fried)


Thanks guys Smile
Ttelmah



Joined: 11 Mar 2010
Posts: 19504

View user's profile Send private message

PostPosted: Fri Aug 08, 2014 12:34 am     Reply with quote

Software SPI, needs perhaps 15+ instructions per bit. Hardware SPI can send bits up to twice the instruction rate. So potentially 'best case' software SPI, is something like 30* slower than hardware SPI....
asmallri



Joined: 12 Aug 2004
Posts: 1634
Location: Perth, Australia

View user's profile Send private message Send e-mail Visit poster's website

Re: 40MIPs and 70MIPs
PostPosted: Fri Aug 08, 2014 1:24 am     Reply with quote

neochrome32 wrote:
Hi guys, i got two chips

a dsPIC33FJ128MC804 - 40MIPs
and
a PIC24EP64GP204 - 70MIPs

now the issue i am having is while I'm do believe I've got them running at their highest speeds,

i don't see any significant speed improvements! only a slight boots

a 10MIPS and a 16 MIPS there is a big difference (those are 8bit)

I've also ran a SOFTWARE SPI for an SDCARD sequence

I'm using 2, one fast, one slow (slow for initial speeds) while this is a great solution to an already created device, the 70MIPs even at full speed software should match if not out perform? the 40MIPs (hardware spi)

OOORRR is software spi just simply bottle necking because it is a form of bit-banging?

(I've been awake a few more hours after bed so my brains a little fried)


Thanks guys Smile


Post your code and let's have a look. Sounds like you do not have the clock/config bits are not being set appropriately. If you are trying to run the hardware SPI bus speed above 10Mbps (actual SPI bus speed) then you need to be very careful with the PCB layout. Getting the SD card running in SPI mode at speeds greater than 10MHz can be an issue - depending on the processor you may need to look at SPI clock skew.
_________________
Regards, Andrew

http://www.brushelectronics.com/software
Home of Ethernet, SD card and Encrypted Serial Bootloaders for PICs!!
neochrome32



Joined: 09 Jun 2013
Posts: 153

View user's profile Send private message Visit poster's website

PostPosted: Fri Aug 08, 2014 11:49 am     Reply with quote

Ttelmah: again i think you hit the nail on the head! 30* slow?? OH MAN when i do the V2.0 of my board, this thing should fly!.

The board is fairly close to the cpu and there is a noise decoupler on the power pins on the sdcard, improved it by QUITE A LOT!

On my 40MIPs its so fast, but 25mhz is working just getting about 1meg
but seems to be rubbish if without that 100nf cap.
(which i disconnected for just fun)

I wrote a SID emulator chip (minus the filter... too dumb to figure that out) on 40mips sounds ok, but 70mips should make it sound amazing?

** 30 instructions per Bit Bang? even with IO on the fast line?
Ttelmah



Joined: 11 Mar 2010
Posts: 19504

View user's profile Send private message

PostPosted: Fri Aug 08, 2014 2:28 pm     Reply with quote

First thing, is that assuming a symmetrical clock, you have to delay the 'unused' half bit time to match the 'working' one.
Now, with SPI, there is a transfer in both directions at the same time.
So set the clock, then you rotate the 16bit output value, test the carry, set or clear the output bit to match the carry, read the input bit on the other line, and rotate this into the word you are using to assemble the reply, then toggle the clock, decrement the counter, add a delay so this half cycle is the same, and loop back to the start if the counter hasn't finished....
A lot of cycles.
bkamen



Joined: 07 Jan 2004
Posts: 1615
Location: Central Illinois, USA

View user's profile Send private message

PostPosted: Mon Aug 11, 2014 12:36 pm     Reply with quote

Just for the record:

Could you please write more descriptive topic subjects?

next:

40 and 70MIPS are HUGE in speed -- but any zippy CPU can be crippled with things like:


* Software implemented communications (like software serial)
* Poor or NO use of interrupts
* Poor use of buffering
* High use of (and this is important) BLOCKING FUNCTIONS. (like delay_ms)

That last one is important.

When I want to make the most of any CPU, I never use blocking functions unless critical. no uses of delay_xx, everything is interrupt driven if I can help it. Main() might be just a big state machine.

So -- let's keep that in mind. Poor software design can bring any CPU to its knees.

Use those hardware modules, that's what they're there for.

-Ben
_________________
Dazed and confused? I don't think so. Just "plain lost" will do. :D
neochrome32



Joined: 09 Jun 2013
Posts: 153

View user's profile Send private message Visit poster's website

PostPosted: Mon Aug 11, 2014 6:16 pm     Reply with quote

Sorry for the poor topic headers...

currently the software use of things are when the Sid is loading, after that its pretty much not used..

there IS a double in speed so pretty much i was expecting WAY more... so in the end i found it was doing what i asked..

the board design was for another chip so the software SPI isn't an issue anymore for right now...

i was even able to over clock this!

setup_oscillator(OSC_RC, 140000000, 5500000);
didn't expect this to work!

basically im just playing cowboy with this thing now.
Ttelmah



Joined: 11 Mar 2010
Posts: 19504

View user's profile Send private message

PostPosted: Tue Aug 12, 2014 12:22 am     Reply with quote

Don't be surprised at this.

Remember, that the rated speed, is for the full range of legal supply voltages, and temperatures, and is what the manufacturer 'warrants' the supplied chips to do.
The actual achievable speed on 99% of chips will be higher over the entire range, and for a limited range of temperature and voltage, will typically be up to 20% higher than the specification.
However don't then be surprised if 'odd' problems appear with a small change in supply voltage, or ambient temperature....
One thing that will commonly 'help', is adding extra cooling.
neochrome32



Joined: 09 Jun 2013
Posts: 153

View user's profile Send private message Visit poster's website

PostPosted: Tue Aug 12, 2014 5:53 pm     Reply with quote

i've noticed! its a pretty cool boost! though i normally like to keep things as normal speeds.. since your right, its at the warrenty and expected rates! :D

thanks buddy Smile
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group