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mukeshp11
Joined: 10 Dec 2008 Posts: 15
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Dead time while using pulse steering mode |
Posted: Tue Jan 17, 2012 5:31 am |
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Hello,
Is it possible to generate dead time while using pulse steering mode between P1A,P1C & P1B,P1D ?
I require to generate dead time of around 1 microsecond between pulses P1A&P1B, P1C&P1D.
pls comment.
Regards,
Mukesh |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19369
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Posted: Tue Jan 17, 2012 5:45 am |
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First, you need to tell us what chip?.
Then what PWM mode you are actually running in?.
Normally 'pulse steering' is only available when using a single PWM output, which can then be 'steered' to one of the four available pins. As such no dead time possibility. Dead time only generally exists, when complementary phases are being generated (half bridge or full bridge), and these don't support pulse-steering on the chips I know.
Best Wishes |
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temtronic
Joined: 01 Jul 2010 Posts: 9174 Location: Greensville,Ontario
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Posted: Tue Jan 17, 2012 7:32 am |
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Mr T is right we need more information. I know of 2 different ways to accomplish the delay but it depends on the hardware. |
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mukeshp11
Joined: 10 Dec 2008 Posts: 15
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Posted: Tue Jan 17, 2012 8:51 am |
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The chip is PIC 16F690.
Ok I also think its not possible to give dead time with pulse steering mode. |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19369
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Posted: Tue Jan 17, 2012 3:16 pm |
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Not directly.
You could though ensure by synchronising to the PWM clock, that you (for example), turn off the PWM for a moment before you change the target of the PWM. Remember that the timer's interrupt flag gets set at the start of the pulse.
Best Wishes |
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temtronic
Joined: 01 Jul 2010 Posts: 9174 Location: Greensville,Ontario
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Posted: Tue Jan 17, 2012 5:23 pm |
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If you mean you always want a 1us delay between P1A and P1B, external hardware could easily do it. Something like a simple r-c network or a few logic gates (buffers) could do the delay. It depends upon the speed of the PWM signal, which we don't know. There are also 'delay lines' available in either discrete or logic forms. Heck you even feed the P1B output back into the PIC, read it, write it to another output pin.
Can't help with the exact design as only you know the requirements and components of your project. |
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mukeshp11
Joined: 10 Dec 2008 Posts: 15
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Posted: Wed Jan 18, 2012 12:48 am |
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In PIC 16F690
In half bridge mode-
The 16f690.h head file the PWM1CON register for dead band is not defined. So I am trying to generate dead band in half bridge mode as follows:
Code: |
#if defined(__PCM__) // Preprocessor directive that chooses the compiler
#include <16f690.h> // Preprocessor directive that selects the chip
#DEVICE ICD=TRUE
#device adc=8
#fuses HS, NOWDT, NOPROTECT
#use delay(clock=20000000)
//#include <STDLIB.h>
#endif
#byte PWM1CON=0x01 (for 5us dead time and my FOSC-20MHz)
void timer2_isr(void)
{
set_pwm1_duty(200);
setup_ccp1(CCP_PWM_HALF_BRIDGE | CCP_PWM_H_H );
}
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I have written just the relevant code for half bridge dead band generation.
So I am initially setting PW1CON register. But still I am not getting dead timer between P1A and P1B. Its zero dead time.
Kindly comment how can I use PWM1CON, because I am not able to generate dead time using it.
Mukesh |
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Ttelmah
Joined: 11 Mar 2010 Posts: 19369
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Posted: Wed Jan 18, 2012 2:55 am |
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OK.
Half bridge mode _does not support pulse steering_.
In half bridge mode, the outputs are P1A, and P1B _only_.
Table 11-4 in the data sheet. Note1.
Also the first paragraph of 11.4.7 'In Single Output mode'.....
In CCS the function to give the delay is:
setup_ccp1(CCP_PWM_HALF_BRIDGE | CCP_PWM_H_H,10 );
The '10' here sets the deadband delay to 10. Choose your number to suit. It does work.
Best Wishes |
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mukeshp11
Joined: 10 Dec 2008 Posts: 15
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Posted: Thu Jan 19, 2012 11:04 pm |
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Thanks Ttelmah,
I am getting dead time by this instruction:
Code: |
setup_ccp1(CCP_PWM_HALF_BRIDGE | CCP_PWM_H_H, 10 );
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I am getting dead time of 2us with 20MHz crystal.
Thanks,
Mukesh |
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